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    a5f3184a
    Improve Tandem Simulation, switch-able caches and fix a cache-bug (#192) · a5f3184a
    Florian Zaruba authored
    * Add spike isa sim
    
    * Fix AMO problem in verilator
    
    * :art: Tidy up FPU wrapper
    
    * Bump axi_exclusive submodule
    
    * Refactor serpent AXI adapter, bump dbg and atomics submodules, add separate bootrom for linux on OpenPiton (#190)
    
    * Refactor serpent AXI adapter
    
    * Disable FPU in OpenPiton by default
    
    * Bump dbg and atomics submodules
    
    * Fix cache testbenches (interface change)
    
    * FPGA bootrom changes for OpenPiton SDHC
    
    * Introduce two bootroms, one for baremetal apps (pitonstream), and one for linux boot from SD
    
    * Testing barrier-based synchronisation instead of CLINT-based
    
    * This bootrom works for 2 core on g2 and if you change MAX_HARTS to 4, then 4 cores on vc707
    
    * Add MAX_HARTS switch to makefile
    
    * Fix gitlab CI
    
    * Revert standard FPGA bootrom
    
    * Update Flist
    
    * Make UART_FREQ a parameter
    
    * Fix typo in tb.list and an error in define switch in ariane_pkg
    
    * Copy over SD-driver in bootloader from @leon575777642
    
    * Fix compilation issues of bootrom
    
    * Change signal name in serpent periph portlist
    
    * Correct generate statement in serpent dcache memory
    
    * Add Piton SD Controller, FPGA fixes
    
    * Fix race condition in dcache misshandler
    
    * Add tandem spike to Make flow
    
    * Remove OpenPiton SD Card controller again
    a5f3184a
    History
    Improve Tandem Simulation, switch-able caches and fix a cache-bug (#192)
    Florian Zaruba authored
    * Add spike isa sim
    
    * Fix AMO problem in verilator
    
    * :art: Tidy up FPU wrapper
    
    * Bump axi_exclusive submodule
    
    * Refactor serpent AXI adapter, bump dbg and atomics submodules, add separate bootrom for linux on OpenPiton (#190)
    
    * Refactor serpent AXI adapter
    
    * Disable FPU in OpenPiton by default
    
    * Bump dbg and atomics submodules
    
    * Fix cache testbenches (interface change)
    
    * FPGA bootrom changes for OpenPiton SDHC
    
    * Introduce two bootroms, one for baremetal apps (pitonstream), and one for linux boot from SD
    
    * Testing barrier-based synchronisation instead of CLINT-based
    
    * This bootrom works for 2 core on g2 and if you change MAX_HARTS to 4, then 4 cores on vc707
    
    * Add MAX_HARTS switch to makefile
    
    * Fix gitlab CI
    
    * Revert standard FPGA bootrom
    
    * Update Flist
    
    * Make UART_FREQ a parameter
    
    * Fix typo in tb.list and an error in define switch in ariane_pkg
    
    * Copy over SD-driver in bootloader from @leon575777642
    
    * Fix compilation issues of bootrom
    
    * Change signal name in serpent periph portlist
    
    * Correct generate statement in serpent dcache memory
    
    * Add Piton SD Controller, FPGA fixes
    
    * Fix race condition in dcache misshandler
    
    * Add tandem spike to Make flow
    
    * Remove OpenPiton SD Card controller again