diff --git a/src/ariane.sv b/src/ariane.sv index b1a75757d1b8d4bb941de06978d04bda0787b5d2..7726a772b962be83d8e5a01320ac02e525353aad 100644 --- a/src/ariane.sv +++ b/src/ariane.sv @@ -95,6 +95,7 @@ module ariane import ariane_pkg::*; #( // ID -> verifier // -------------- logic has_mem_access_id_verif; + logic has_ctrl_flow_id_icache; // -------------- // ISSUE -> verifier @@ -303,6 +304,7 @@ module ariane import ariane_pkg::*; #( .issue_entry_valid_o ( issue_entry_valid_id_issue ), .is_ctrl_flow_o ( is_ctrl_fow_id_issue ), .is_mem_instr_o ( has_mem_access_id_verif ), + .has_ctrl_flow_o ( has_ctrl_flow_id_icache ), .issue_instr_ack_i ( issue_instr_issue_id ), .priv_lvl_i ( priv_lvl ), diff --git a/src/id_stage.sv b/src/id_stage.sv index 7edc74a97b3aca367747b71ad1ad8ef408fdf3da..6dd3ff789d7d360f9b3e75c79311c71d63cf29c6 100644 --- a/src/id_stage.sv +++ b/src/id_stage.sv @@ -38,7 +38,8 @@ module id_stage ( input logic tvm_i, input logic tw_i, input logic tsr_i, - output logic is_mem_instr_o + output logic is_mem_instr_o, + output logic has_ctrl_flow_o // speculative CF (ie. no jals) ); // ID/ISSUE register stage struct packed { @@ -96,6 +97,7 @@ module id_stage ( assign issue_entry_o = issue_q.sbe; assign issue_entry_valid_o = issue_q.valid; assign is_ctrl_flow_o = issue_q.is_ctrl_flow; + assign has_ctrl_flow_o = issue_q.valid && issue_q.is_ctrl_flow && issue_q.sbe.op != ariane_pkg::ADD; assign is_mem_instr_o = is_mem_instr_q;