diff --git a/include/ariane_pkg.sv b/include/ariane_pkg.sv
index 91b38513fe679a00537f1cf3beec4d2d0a953f45..9e73fb797bf498a31ad5690a09d0c2c89d582bc4 100644
--- a/include/ariane_pkg.sv
+++ b/include/ariane_pkg.sv
@@ -220,7 +220,7 @@ package ariane_pkg;
// 32 registers + 1 bit for re-naming = 6
localparam REG_ADDR_SIZE = 6;
- localparam NR_WB_PORTS = 4;
+ localparam NR_WB_PORTS = 5;
// static debug hartinfo
localparam dm::hartinfo_t DebugHartInfo = '{
diff --git a/src/ariane.sv b/src/ariane.sv
index e6fe962d4844fe7a92796905dea3b828ad5f3f29..33752853c76c66d581a5a5b1908810ebeab6aee9 100644
--- a/src/ariane.sv
+++ b/src/ariane.sv
@@ -146,6 +146,11 @@ module ariane import ariane_pkg::*; #(
logic store_valid_ex_id;
exception_t store_exception_ex_id;
// MULT
+ logic mult_ready_ex_id;
+ logic [TRANS_ID_BITS-1:0] mult_trans_id_ex_id;
+ logic mult_valid_ex_id;
+ riscv::xlen_t mult_result_ex_id;
+ exception_t mult_exception_ex_id;
logic mult_valid_id_ex;
// FPU
logic fpu_ready_ex_id;
@@ -361,6 +366,7 @@ module ariane import ariane_pkg::*; #(
.lsu_ready_i ( lsu_ready_ex_id ),
.lsu_valid_o ( lsu_valid_id_ex ),
// Multiplier
+ .mult_ready_i ( mult_ready_ex_id ),
.mult_valid_o ( mult_valid_id_ex ),
// FPU
.fpu_ready_i ( fpu_ready_ex_id ),
@@ -371,10 +377,10 @@ module ariane import ariane_pkg::*; #(
.csr_valid_o ( csr_valid_id_ex ),
// Commit
.resolved_branch_i ( resolved_branch ),
- .trans_id_i ( {flu_trans_id_ex_id, load_trans_id_ex_id, store_trans_id_ex_id, fpu_trans_id_ex_id }),
- .wbdata_i ( {flu_result_ex_id, load_result_ex_id, store_result_ex_id, fpu_result_ex_id }),
- .ex_ex_i ( {flu_exception_ex_id, load_exception_ex_id, store_exception_ex_id, fpu_exception_ex_id }),
- .wt_valid_i ( {flu_valid_ex_id, load_valid_ex_id, store_valid_ex_id, fpu_valid_ex_id }),
+ .trans_id_i ( {flu_trans_id_ex_id, load_trans_id_ex_id, store_trans_id_ex_id, fpu_trans_id_ex_id, mult_trans_id_ex_id }),
+ .wbdata_i ( {flu_result_ex_id, load_result_ex_id, store_result_ex_id, fpu_result_ex_id, mult_result_ex_id }),
+ .ex_ex_i ( {flu_exception_ex_id, load_exception_ex_id, store_exception_ex_id, fpu_exception_ex_id, mult_exception_ex_id }),
+ .wt_valid_i ( {flu_valid_ex_id, load_valid_ex_id, store_valid_ex_id, fpu_valid_ex_id, mult_valid_ex_id }),
.waddr_i ( waddr_commit_id ),
.wdata_i ( wdata_commit_id ),
@@ -421,6 +427,11 @@ module ariane import ariane_pkg::*; #(
.csr_addr_o ( csr_addr_ex_csr ),
.csr_commit_i ( csr_commit_commit_ex ), // from commit
// MULT
+ .mult_result_o ( mult_result_ex_id ),
+ .mult_trans_id_o ( mult_trans_id_ex_id ),
+ .mult_valid_o ( mult_valid_ex_id ),
+ .mult_exception_o ( mult_exception_ex_id ),
+ .mult_ready_o ( mult_ready_ex_id ),
.mult_valid_i ( mult_valid_id_ex ),
// LSU
.lsu_ready_o ( lsu_ready_ex_id ),
diff --git a/src/ex_stage.sv b/src/ex_stage.sv
index 6d4fa1fa654c60e0000c9238323f838512774fb3..402bbb330861b3f4e1fed14736726b49563b6871 100644
--- a/src/ex_stage.sv
+++ b/src/ex_stage.sv
@@ -48,6 +48,11 @@ module ex_stage import ariane_pkg::*; #(
output logic [11:0] csr_addr_o,
input logic csr_commit_i,
// MULT
+ output riscv::xlen_t mult_result_o,
+ output logic [TRANS_ID_BITS-1:0] mult_trans_id_o,
+ output exception_t mult_exception_o,
+ output logic mult_ready_o, // MULT is ready
+ output logic mult_valid_o, // MULT result is valid
input logic mult_valid_i, // Output is valid
// LSU
output logic lsu_ready_o, // FU is ready
@@ -137,11 +142,9 @@ module ex_stage import ariane_pkg::*; #(
// from ALU to branch unit
logic alu_branch_res; // branch comparison result
- riscv::xlen_t alu_result, csr_result, mult_result;
+ riscv::xlen_t alu_result, csr_result;
logic [riscv::VLEN-1:0] branch_result;
- logic csr_ready, mult_ready;
- logic [TRANS_ID_BITS-1:0] mult_trans_id;
- logic mult_valid;
+ logic csr_ready;
// 1. ALU (combinatorial)
// data silence operation
@@ -190,7 +193,7 @@ module ex_stage import ariane_pkg::*; #(
.csr_addr_o
);
- assign flu_valid_o = alu_valid_i | branch_valid_i | csr_valid_i | mult_valid;
+ assign flu_valid_o = alu_valid_i | branch_valid_i | csr_valid_i;
// result MUX
always_comb begin
@@ -203,34 +206,29 @@ module ex_stage import ariane_pkg::*; #(
// CSR result
end else if (csr_valid_i) begin
flu_result_o = csr_result;
- end else if (mult_valid) begin
- flu_result_o = mult_result;
- flu_trans_id_o = mult_trans_id;
end
end
// ready flags for FLU
- always_comb begin
- flu_ready_o = csr_ready & mult_ready;
- end
+ assign flu_ready_o = csr_ready;
// 4. Multiplication (Sequential)
- fu_data_t mult_data;
- // input silencing of multiplier
- assign mult_data = mult_valid_i ? fu_data_i : '0;
-
mult i_mult (
.clk_i,
.rst_ni,
.flush_i,
.mult_valid_i,
- .fu_data_i ( mult_data ),
- .result_o ( mult_result ),
- .mult_valid_o ( mult_valid ),
- .mult_ready_o ( mult_ready ),
- .mult_trans_id_o ( mult_trans_id )
+ .fu_data_i ( fu_data_i ),
+ .result_o ( mult_result_o ),
+ .mult_valid_o ( mult_valid_o ),
+ .mult_ready_o ( mult_ready_o ),
+ .mult_trans_id_o ( mult_trans_id_o )
);
+ assign mult_exception_o.valid = 1'b0;
+ assign mult_exception_o.cause = '0;
+ assign mult_exception_o.tval = '0;
+
// ----------------
// FPU
// ----------------
diff --git a/src/issue_read_operands.sv b/src/issue_read_operands.sv
index e35165dc790231aea63977acc6f32427d2724c98..1bdd15a8bfef214d8eb1277510f4ff19474f9b64 100644
--- a/src/issue_read_operands.sv
+++ b/src/issue_read_operands.sv
@@ -54,6 +54,7 @@ module issue_read_operands import ariane_pkg::*; #(
input logic lsu_ready_i, // FU is ready
output logic lsu_valid_o, // Output is valid
// MULT
+ input logic mult_ready_i, // MULT ready to accept a new request
output logic mult_valid_o, // Output is valid
// FPU
input logic fpu_ready_i, // FU is ready
@@ -128,10 +129,12 @@ module issue_read_operands import ariane_pkg::*; #(
// this obviously depends on the functional unit we need
always_comb begin : unit_busy
unique case (issue_instr_i.fu)
- NONE, ALU, CTRL_FLOW:
+ NONE:
fu_busy = 1'b0;
- CSR, MULT:
+ ALU, CTRL_FLOW, CSR:
fu_busy = ~flu_ready_i;
+ MULT:
+ fu_busy = ~mult_ready_i;
FPU, FPU_VEC:
fu_busy = ~fpu_ready_i;
LOAD, STORE:
diff --git a/src/issue_stage.sv b/src/issue_stage.sv
index c20e8b2c6393a50cafa720e7c68c13b0dd84e207..2492b203d7315a599daf98fdfa63f54bc45f6f47 100644
--- a/src/issue_stage.sv
+++ b/src/issue_stage.sv
@@ -47,6 +47,7 @@ module issue_stage import ariane_pkg::*; #(
output logic branch_valid_o, // use branch prediction unit
output branchpredict_sbe_t branch_predict_o, // Branch predict Out
+ input logic mult_ready_i,
output logic mult_valid_o,
input logic fpu_ready_i,