From 45271647247657949126b26f6fe272c031671ad4 Mon Sep 17 00:00:00 2001 From: sjthales <sebastien.jacq@thalesgroup.com> Date: Fri, 4 Dec 2020 16:54:43 +0100 Subject: [PATCH] updating README to implement CV32A6 on Zybo z7-20 board --- README.md | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/README.md b/README.md index 45904c17..8f07b1e1 100644 --- a/README.md +++ b/README.md @@ -233,16 +233,19 @@ Below is described steps to run Coremark application on CV32A6 FPGA platform, st ## Get started with Coremark application 1. First, make sure the digilent **JTAG-HS2 debug adapter** is properly connected to the **PMOD JE** connector and that the USBAUART adapter is properly connected to the **PMOD JB** connector of the Zybo Z7-20 board. - + 2. compile coremark application in `sw/app` 3. Generate the bitstream of the FPGA platform: ``` $ make cva6_fpga ``` -4. When bistream is generated, switch on Zybo board and run: +4. When bitstream is generated, switch on Zybo board and run: ``` $ make program_cva6_fpga ``` +When is loaded led `done` is lighting. + + 5. then, in a terminal, launch **OpenOCD**: ``` $ openocd -f fpga/openocd_digilent_hs2.cfg -- GitLab