From 7794673dc8cb7aa39b330115f0154da5e355da6e Mon Sep 17 00:00:00 2001
From: sjthales <sebastien.jacq@thalesgroup.com>
Date: Tue, 8 Dec 2020 13:20:43 +0100
Subject: [PATCH] updating to into account serial number of HS2 cable
---
Makefile | 7 ++++++-
README.md | 17 +++++++++++++++++
fpga/Makefile | 5 +++++
fpga/scripts/get_hs2_sn.tcl | 8 ++++++++
fpga/scripts/program_cva6_fpga.tcl | 2 +-
5 files changed, 37 insertions(+), 2 deletions(-)
create mode 100644 fpga/scripts/get_hs2_sn.tcl
diff --git a/Makefile b/Makefile
index 867b1fdd..bf3e6a62 100644
--- a/Makefile
+++ b/Makefile
@@ -288,7 +288,7 @@ cva6_ooc: $(ariane_pkg) $(util) $(src) $(fpga_src)
@echo read_verilog -sv {$(fpga_src)} >> fpga/scripts/add_sources.tcl
cd fpga && make cva6_ooc BOARD=$(BOARD) XILINX_PART=$(XILINX_PART) XILINX_BOARD=$(XILINX_BOARD) CLK_PERIOD_NS=$(CLK_PERIOD_NS) BATCH_MODE=$(BATCH_MODE)
-.PHONY: cva6_ooc cva6_fpga program_cva6_fpga
+.PHONY: cva6_ooc cva6_fpga program_cva6_fpga get_hs2_id
cva6_fpga: $(ariane_pkg) $(util) $(src) $(fpga_src) $(uart_src)
@echo "[FPGA] Generate sources"
@@ -305,6 +305,11 @@ program_cva6_fpga:
@echo "[FPGA] Program FPGA"
cd fpga && make program_cva6_fpga BOARD=$(BOARD) XILINX_PART=$(XILINX_PART) XILINX_BOARD=$(XILINX_BOARD) CLK_PERIOD_NS=$(CLK_PERIOD_NS) BATCH_MODE=$(BATCH_MODE)
+
+get_hs2_sn:
+ @echo "[FPGA] Get HS2 serial number"
+ cd fpga && make get_hs2_sn
+
clean:
rm -rf $(riscv-torture-dir)/output/test*
rm -rf $(library)/ $(dpi-library)/ $(ver-library)/
diff --git a/README.md b/README.md
index f8c81dd5..6189d3e4 100644
--- a/README.md
+++ b/README.md
@@ -230,6 +230,23 @@ This platform integrates a CV32A6 processor, a JTAG interface to run and debug s
Below are described steps to run Coremark application on CV32A6 FPGA platform, steps are the same for Dhrystone application and other software applications.
+The JTAG-HS2 programming cable is initially a cable that allows programming of Xilinx FPGAs (bitstream loading) from a host PC.
+In our case, we use this cable to program software applications on the CV32A6 instantiated in the FPGA through a PMOD connector.
+We do not use the HS2 Cable in its original function therfore there is a preliminary step which consists in retrieving the serial number of the HS2 cable.
+To do this, connect the HS2 cable to the host PC (Zybo Z7-20 board must be disconnected from the host PC) and run the following command:
+```
+make get_hs2_sn
+```
+you should see:
+```
+...............
+###############################
+# TARGEt: localhost:3121/xilinx_tcf/Digilent/<**HS2's serial number**>
+###############################
+......................
+```
+Replace the **HS2's serial number** in `fpga/openocd_digilent_hs2.cfg` file by the serial number of your HS2 cable.
+
## Get started with Coremark application
1. First, make sure the Digilent **JTAG-HS2 debug adapter** is properly connected to the **PMOD JE** connector and that the USBUART adapter is properly connected to the **PMOD JB** connector of the Zybo Z7-20 board.
diff --git a/fpga/Makefile b/fpga/Makefile
index 250952f4..7b7a9e62 100644
--- a/fpga/Makefile
+++ b/fpga/Makefile
@@ -63,6 +63,11 @@ else
$(VIVADO) -source scripts/program_cva6_fpga.tcl
endif
+get_hs2_sn:
+ $(VIVADO) -mode batch -source scripts/get_hs2_sn.tcl
+
+
+
$(ips): %.xci :
mkdir -p $(work-dir)
diff --git a/fpga/scripts/get_hs2_sn.tcl b/fpga/scripts/get_hs2_sn.tcl
new file mode 100644
index 00000000..e5185935
--- /dev/null
+++ b/fpga/scripts/get_hs2_sn.tcl
@@ -0,0 +1,8 @@
+open_hw_manager
+connect_hw_server
+foreach TARGET [get_hw_targets] {
+ puts "###############################"
+ puts "# TARGET: $TARGET"
+ puts "###############################"
+}
+
diff --git a/fpga/scripts/program_cva6_fpga.tcl b/fpga/scripts/program_cva6_fpga.tcl
index 4f4c9709..0fa97ab1 100644
--- a/fpga/scripts/program_cva6_fpga.tcl
+++ b/fpga/scripts/program_cva6_fpga.tcl
@@ -1,6 +1,6 @@
open_hw_manager
connect_hw_server
-current_hw_target [get_hw_targets -filter {NAME!~"localhost:3121/xilinx_tcf/Digilent/210249A85F9B"}]
+current_hw_target [get_hw_targets -filter {NAME!~"localhost:3121/xilinx_tcf/Digilent/<HS2's serial number>"}]
open_hw_target
set_property PROGRAM.FILE {cva6_fpga.runs/impl_1/cva6_zybo_z7_20.bit} [get_hw_devices xc7z020_1]
current_hw_device [get_hw_devices xc7z020_1]
--
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