diff --git a/bench/bsp/config/link.ld b/bench/bsp/config/link.ld
index 0225955845b9821d80e34f3ba55284592a6d7661..fa39710719310a6852a221efefbb71c0555abd24 100644
--- a/bench/bsp/config/link.ld
+++ b/bench/bsp/config/link.ld
@@ -9,16 +9,16 @@
 /* This linker script is adapted from the default linker script for upstream
    RISC-V GCC.  It has been modified for use in verification of CORE-V cores.
 */
-// Additional contributions by:
-//         Sebastien Jacq - sjthales on github.com
-//
-// Description: linkerscript for the CV32A6 platform
-//
-// =========================================================================== //
-// Revisions  :
-// Date        Version  Author       Description
-// 2020-10-06  0.1      S.Jacq       modification of the Test for CV32A6 softcore
-// =========================================================================== //
+/* Additional contributions by:
+           Sebastien Jacq - sjthales on github.com
+
+   Description: linkerscript for the CV32A6 platform
+
+   =========================================================================== 
+   Revisions  :
+   Date        Version  Author       Description
+   2020-10-06  0.1      S.Jacq       modification of the Test for CV32A6 softcore
+   =========================================================================== */
 
 OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv",
 	      "elf32-littleriscv")