diff --git a/QDMA/linux-kernel/Makefile b/QDMA/linux-kernel/Makefile index e8fd7deba93c22fdab5f6fdc8315d1ebc129a027..53b933d7f13b875a5cb7c867ca8d904920373756 100755 --- a/QDMA/linux-kernel/Makefile +++ b/QDMA/linux-kernel/Makefile @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/RELEASE b/QDMA/linux-kernel/RELEASE index 67a56ec1351357e46b2b4badd235e5b3f1abb3b7..170685788ac7ae56f4cfbacae3d89bf882ee3bde 100755 --- a/QDMA/linux-kernel/RELEASE +++ b/QDMA/linux-kernel/RELEASE @@ -1,5 +1,5 @@ -RELEASE: 2022.1.5 Patch -======================= +RELEASE: 2023.1.0 +================= This release is validated - On VCU1525 for QDMA5.0 2022.1 example design @@ -127,10 +127,19 @@ CPM5 ---------------------- - Added PF/VF 4K queues support for CPM5 design. This feature is applicable only when corresponding RTL support is added. +2023.1 Updates +-------------- +- Updated the queue list command for >2048 Q's. +- Added support to accomodate H2C & C2H Q's offset with fixed intervals for dma-perf application. + KNOWN ISSUES: ============= - CPM5 Only - - Adding >3000 queues using dma-ctl application throwing an error message even though the queues are added successfully. For now error message can be ignored and this will be fixed in subsequent releases. + - Data transfers are not happening when FLR is triggered with 10 VFs created on each PF. + - Performace optimizations are not finalized yet. + +- QDAM5.0 + - Performace optimizations are not finalized yet. - All Designs - In interrupt mode, Sometimes completions are not received when C2H PIDX updates are held for 64 descriptors @@ -157,7 +166,7 @@ DRIVER LIMITATIONS: * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/apps/Makefile b/QDMA/linux-kernel/apps/Makefile index b4febd2643bfe9c49283fb8e11f91dfac8950bd7..9b7e9875e5cc1294cee3957c954de69c042b3f94 100755 --- a/QDMA/linux-kernel/apps/Makefile +++ b/QDMA/linux-kernel/apps/Makefile @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-ctl/Makefile b/QDMA/linux-kernel/apps/dma-ctl/Makefile index 04a5bed23c395fcd23327cf1f4f36ef81e5b9ee3..ef55091f3b7a7483bfb3c4eeca0f308e0aaa7cfa 100755 --- a/QDMA/linux-kernel/apps/dma-ctl/Makefile +++ b/QDMA/linux-kernel/apps/dma-ctl/Makefile @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-ctl/cmd_parse.c b/QDMA/linux-kernel/apps/dma-ctl/cmd_parse.c index b2a9202e10e73465b5924c7e0fdc84a291e67cf0..7dcbf63b61eea166167edcbc3aeced1be3daade0 100755 --- a/QDMA/linux-kernel/apps/dma-ctl/cmd_parse.c +++ b/QDMA/linux-kernel/apps/dma-ctl/cmd_parse.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -205,7 +205,7 @@ static void __attribute__((noreturn)) usage(FILE *fp) "\t\tstat statistics of qdma[N] device\n" "\t\tstat clear clear all statistics data of qdma[N} device\n" "\t\tglobal_csr dump the Global CSR of qdma[N} device\n" - "\t\tq list list all queues\n" + "\t\tq list <start_idx> <num_Qs> - List <num_Qs> queues from idx <start_idx>\n" "\t\tq add idx <N> [mode <mm|st>] [dir <h2c|c2h|bi|cmpt>] - add a queue\n" "\t\t *mode default to mm\n" "\t\t *dir default to h2c\n" @@ -996,6 +996,8 @@ static int read_qparm(int argc, char *argv[], int i, struct xcmd_q_parm *qparm, static int parse_q_cmd(int argc, char *argv[], int i, struct xcmd_info *xcmd) { struct xcmd_q_parm *qparm = &xcmd->req.qparm; + uint32_t v1; + unsigned int f_arg_set = 0; int rv; int args_valid; @@ -1013,6 +1015,15 @@ static int parse_q_cmd(int argc, char *argv[], int i, struct xcmd_info *xcmd) if (!strcmp(argv[i], "list")) { xcmd->op = XNL_CMD_Q_LIST; + rv = next_arg_read_int(argc, argv, &i, &v1); + if (rv < 0) + return rv; + qparm->idx = v1; + f_arg_set |= 1 << QPARM_IDX; + rv = next_arg_read_int(argc, argv, &i, &v1); + if (rv < 0) + return rv; + qparm->num_q = v1; return ++i; } else if (!strcmp(argv[i], "add")) { unsigned int mask; @@ -1104,6 +1115,7 @@ static int parse_q_cmd(int argc, char *argv[], int i, struct xcmd_info *xcmd) args_valid = validate_qcmd(xcmd->op, qparm); + qparm->sflags = f_arg_set; return (args_valid == 0) ? i : args_valid; } diff --git a/QDMA/linux-kernel/apps/dma-ctl/cmd_parse.h b/QDMA/linux-kernel/apps/dma-ctl/cmd_parse.h index 82518d8aaf9e0d74c5c8fee209a06dd0dc6c0ad4..ecd9224dc83ac597a20cd0195b0c30a3ec8967ee 100755 --- a/QDMA/linux-kernel/apps/dma-ctl/cmd_parse.h +++ b/QDMA/linux-kernel/apps/dma-ctl/cmd_parse.h @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-ctl/main.c b/QDMA/linux-kernel/apps/dma-ctl/main.c index 5c3e4c77057e3ea8bac3e2c6501a8bec3167cbc5..95159ed89eec9a946637a13d2468ababbcade63a 100755 --- a/QDMA/linux-kernel/apps/dma-ctl/main.c +++ b/QDMA/linux-kernel/apps/dma-ctl/main.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-ctl/version.h b/QDMA/linux-kernel/apps/dma-ctl/version.h index 03188168cf602d98da889899e6f96896e5034375..b69a5b2086af668d4c192a66995408ac090067da 100755 --- a/QDMA/linux-kernel/apps/dma-ctl/version.h +++ b/QDMA/linux-kernel/apps/dma-ctl/version.h @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -13,7 +13,7 @@ #define __DMA_CTL_VERSION_H #define PROGNAME "dma-ctl" -#define VERSION "2022.2.0" -#define COPYRIGHT "Copyright (c) 2018-2022 Xilinx Inc." +#define VERSION "2023.1.0" +#define COPYRIGHT "Copyright (c) 2022-2023 Advanced Micro Devices Inc." #endif diff --git a/QDMA/linux-kernel/apps/dma-from-device/dma_from_device.c b/QDMA/linux-kernel/apps/dma-from-device/dma_from_device.c index 30623f4c27231b187e418c2c6fb5d980bf2af49f..fe3475759dde200b9c88b2dcc3aae32541298d06 100755 --- a/QDMA/linux-kernel/apps/dma-from-device/dma_from_device.c +++ b/QDMA/linux-kernel/apps/dma-from-device/dma_from_device.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-from-device/version.h b/QDMA/linux-kernel/apps/dma-from-device/version.h index f98c1dbe783c96cfb309960e976c986563dcc3a2..e39ec1efd4d698d93f5f2cea23ca85bd79451b09 100755 --- a/QDMA/linux-kernel/apps/dma-from-device/version.h +++ b/QDMA/linux-kernel/apps/dma-from-device/version.h @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -13,7 +13,7 @@ #define __DMA_FROM_DEVICE_VERSION_H #define PROGNAME "dma-from-device" -#define VERSION "2022.2.0" -#define COPYRIGHT "Copyright (c) 2018-2022 Xilinx Inc." +#define VERSION "2023.1.0" +#define COPYRIGHT "Copyright (c) 2022-2023 Advanced Micro Devices Inc." #endif diff --git a/QDMA/linux-kernel/apps/dma-latency/Makefile b/QDMA/linux-kernel/apps/dma-latency/Makefile index 8e49270f67e2c0dc74f67cc3abc3d84c3ad15a26..56549730842f75cb3fd8822d3388c8777efb4dc7 100755 --- a/QDMA/linux-kernel/apps/dma-latency/Makefile +++ b/QDMA/linux-kernel/apps/dma-latency/Makefile @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-latency/Readme.txt b/QDMA/linux-kernel/apps/dma-latency/Readme.txt index 952f1dba0cc97efe9f46d9707df402c3567f5bf2..9c07c2c888a0aff295520b377e4ba143c9c215e7 100755 --- a/QDMA/linux-kernel/apps/dma-latency/Readme.txt +++ b/QDMA/linux-kernel/apps/dma-latency/Readme.txt @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under both the BSD-style license (found in the * LICENSE file in the root directory of this source tree) and the GPLv2 (found diff --git a/QDMA/linux-kernel/apps/dma-latency/dmalat.c b/QDMA/linux-kernel/apps/dma-latency/dmalat.c index 24a53aaf7a1fff609a3f94808658803eed8d2130..d20c5c4612975a1d12edd34b9c96a0ae748f2d23 100755 --- a/QDMA/linux-kernel/apps/dma-latency/dmalat.c +++ b/QDMA/linux-kernel/apps/dma-latency/dmalat.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-latency/sample_dma_latency_config.txt b/QDMA/linux-kernel/apps/dma-latency/sample_dma_latency_config.txt index 4ef735edaa27b9b098317b435ed63bf96d59ac54..f7108450692a9db6f6eb167353f62da0120ce270 100755 --- a/QDMA/linux-kernel/apps/dma-latency/sample_dma_latency_config.txt +++ b/QDMA/linux-kernel/apps/dma-latency/sample_dma_latency_config.txt @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-latency/version.h b/QDMA/linux-kernel/apps/dma-latency/version.h index 9a3e4aff4fb29b61ab9dc75258a8ea07893367bc..610e9235d927dad3213b7da5f1fbe9d2dcc4f5fb 100755 --- a/QDMA/linux-kernel/apps/dma-latency/version.h +++ b/QDMA/linux-kernel/apps/dma-latency/version.h @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -13,7 +13,7 @@ #define __DMA_LATENCY_VERSION_H #define PROGNAME "dma-latency" -#define VERSION "2022.2.0" -#define COPYRIGHT "Copyright (c) 2018-2022 Xilinx Inc." +#define VERSION "2023.1.0" +#define COPYRIGHT "Copyright (c) 2022-2023 Advanced Micro Devices Inc." #endif diff --git a/QDMA/linux-kernel/apps/dma-perf/Makefile b/QDMA/linux-kernel/apps/dma-perf/Makefile index bacabd60bfa5bd5efb5f6f19a3691b96174fe881..34ba4846dc5d2b727ee602b7ac90e2cc54570c21 100755 --- a/QDMA/linux-kernel/apps/dma-perf/Makefile +++ b/QDMA/linux-kernel/apps/dma-perf/Makefile @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-perf/dmaperf.c b/QDMA/linux-kernel/apps/dma-perf/dmaperf.c index 3ff22bf4622919cd7ce55c13c39d1f1a524b4b31..1d9638e01b09f2b9c7afdf8bfefc0877e60f44d6 100755 --- a/QDMA/linux-kernel/apps/dma-perf/dmaperf.c +++ b/QDMA/linux-kernel/apps/dma-perf/dmaperf.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -222,9 +222,14 @@ static unsigned int num_pkts; static int keyhole_en = 0; static unsigned int aperture_sz = 0; /* For MM Channel =0 or 1 , offset is used for both MM Channels */ -static unsigned long int offset = 0; +static unsigned long int offset_ch0 = 0; /*In MM Channel interleaving offset_ch1 is the offset used for Channel 1*/ static unsigned long int offset_ch1 = 0; +static int offset_q_en= 0; +static unsigned long int h2c_q_offset_intvl = 0; +static unsigned long int c2h_q_offset_intvl = 0; +static unsigned long int h2c_q_start_offset= 0; +static unsigned long int c2h_q_start_offset= 0; static unsigned int tsecs = 0; struct io_info *info = NULL; static char cfg_name[20]; @@ -297,6 +302,15 @@ static int arg_read_long_uint(char *s, uint64_t *v) return 0; } +static int update_q_off(struct io_info *info) +{ + if (info->dir == Q_DIR_H2C) { + info->offset += h2c_q_start_offset + (info->qid * h2c_q_offset_intvl); + } else { + info->offset += c2h_q_start_offset + (info->qid * c2h_q_offset_intvl); + } +} + static int arg_read_int_array(char *s, unsigned int *v, unsigned int max_arr_size) { unsigned int slen = strlen(s); @@ -354,7 +368,7 @@ static int get_array_len(char *s) static void dump_thrd_info(struct io_info *_info) { - printf("q_name = %s\n", info->q_name); + printf("q_name = %s\n", _info->q_name); printf("dir = %d\n", _info->dir); printf("mode = %d\n", _info->mode); printf("idx_cnt = %u\n", _info->idx_cnt); @@ -367,6 +381,7 @@ static void dump_thrd_info(struct io_info *_info) { printf("q_ctrl = %u\n", _info->q_ctrl); printf("q_added = %u\n", _info->q_added); printf("q_started = %u\n", _info->q_started); + printf("offset = 0x%lx\n", _info->offset); if (stm_mode) { printf("pipe_gl_max = %u\n", _info->pipe_gl_max); printf("pipe_flow_id = %u\n", _info->pipe_flow_id); @@ -665,7 +680,9 @@ static void create_thread_info(void) if(mm_chnl == MM_CHANNEL_INTERLEAVE && _info[base].mm_chnl ) _info[base].offset = offset_ch1; else - _info[base].offset = offset; + _info[base].offset = offset_ch0; + if(offset_q_en) + update_q_off(&_info[base]); #if THREADS_SET_CPU_AFFINITY _info[base].cpu = h2c_cpu; #endif @@ -698,7 +715,9 @@ static void create_thread_info(void) if(mm_chnl == MM_CHANNEL_INTERLEAVE && _info[base].mm_chnl ) _info[base].offset = offset_ch1; else - _info[base].offset = offset; + _info[base].offset = offset_ch0; + if(offset_q_en) + update_q_off(&_info[base]); _info[base].pkt_sz = pkt_sz; #if THREADS_SET_CPU_AFFINITY @@ -901,13 +920,37 @@ static void parse_config_file(const char *cfg_fname) printf("Error: Invalid aperture offset:%s\n", value); goto prase_cleanup; } - } else if (!strncmp(config, "offset", 6)) { - if (arg_read_long_uint(value, &offset)) { + } else if (!strncmp(config, "offset_q_en", 11)) { + if (arg_read_int(value, &offset_q_en)) { + printf("Error: Invalid offset_q_en option:%s\n", value); + goto prase_cleanup; + } + } else if (!strncmp(config, "h2c_q_offset_intvl", 18)) { + if (arg_read_long_uint(value, &h2c_q_offset_intvl)) { + printf("Error: Invalid H2C q offset:%s\n", value); + goto prase_cleanup; + } + } else if (!strncmp(config, "c2h_q_offset_intvl", 18)) { + if (arg_read_long_uint(value, &c2h_q_offset_intvl)) { + printf("Error: Invalid C2H q offset:%s\n", value); + goto prase_cleanup; + } + } else if (!strncmp(config, "h2c_q_start_offset", 18)) { + if (arg_read_long_uint(value, &h2c_q_start_offset)) { + printf("Error: Invalid H2C q offset:%s\n", value); + goto prase_cleanup; + } + } else if (!strncmp(config, "c2h_q_start_offset", 18)) { + if (arg_read_long_uint(value, &c2h_q_start_offset)) { + printf("Error: Invalid H2C q offset:%s\n", value); + goto prase_cleanup; + } + } else if (!strncmp(config, "offset_ch0", 10)) { + if (arg_read_long_uint(value, &offset_ch0)) { printf("Error: Invalid aperture offset:%s\n", value); goto prase_cleanup; } } else if (!strncmp(config, "keyhole_en", 7)) { - if (arg_read_int(value, &keyhole_en)) { printf("Error: Invalid keyhole option:%s\n", value); goto prase_cleanup; @@ -1051,7 +1094,7 @@ static void parse_config_file(const char *cfg_fname) printf("Could not open %s\n", rng_sz_path); exit(1); } - ret = read(rng_sz_fd, &rng_sz[1], 100); + ret = read(rng_sz_fd, &rng_sz[1], 99); if (ret < 0) { printf("Error: Could not read the file\n"); exit(1); diff --git a/QDMA/linux-kernel/apps/dma-perf/version.h b/QDMA/linux-kernel/apps/dma-perf/version.h index 392bc478c44b661e6e7f175ee276e3d87d8d61f9..639729103b4e80614666be2a12a1ae56be9f99d8 100755 --- a/QDMA/linux-kernel/apps/dma-perf/version.h +++ b/QDMA/linux-kernel/apps/dma-perf/version.h @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -13,7 +13,7 @@ #define __DMA_PERF_VERSION_H #define PROGNAME "dma-perf" -#define VERSION "2022.2.0" -#define COPYRIGHT "Copyright (c) 2018-2022 Xilinx Inc." +#define VERSION "2023.1.0" +#define COPYRIGHT "Copyright (c) 2022-2023 Advanced Micro Devices Inc." #endif diff --git a/QDMA/linux-kernel/apps/dma-to-device/Makefile b/QDMA/linux-kernel/apps/dma-to-device/Makefile index fab351e8c520651f28b286c03333f26cb05edc97..bccb8346536d0d7732c069a0942f7bce84e7e7d1 100755 --- a/QDMA/linux-kernel/apps/dma-to-device/Makefile +++ b/QDMA/linux-kernel/apps/dma-to-device/Makefile @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-to-device/dma_to_device.c b/QDMA/linux-kernel/apps/dma-to-device/dma_to_device.c index 9f121432452ed04dde32dfd13d1aa3b90d1cd8ad..49d53b0c4568963011ea2df0df9f884b75c57bc9 100755 --- a/QDMA/linux-kernel/apps/dma-to-device/dma_to_device.c +++ b/QDMA/linux-kernel/apps/dma-to-device/dma_to_device.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-to-device/version.h b/QDMA/linux-kernel/apps/dma-to-device/version.h index 2cd20e0577f1fd823ea3bbaa4e792ec55797726e..31112bcb96c4be04648ceb76b5faf4a00b24869e 100755 --- a/QDMA/linux-kernel/apps/dma-to-device/version.h +++ b/QDMA/linux-kernel/apps/dma-to-device/version.h @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -13,7 +13,7 @@ #define __DMA_TO_DEVICE_VERSION_H #define PROGNAME "dma-to-device" -#define VERSION "2022.2.0" -#define COPYRIGHT "Copyright (c) 2018-2022 Xilinx Inc." +#define VERSION "2023.1.0" +#define COPYRIGHT "Copyright (c) 2022-2023 Advanced Micro Devices Inc." #endif diff --git a/QDMA/linux-kernel/apps/dma-utils/Makefile b/QDMA/linux-kernel/apps/dma-utils/Makefile index 1fb355812a58ad0c4772adf9292c46753419e829..f6d9ecd1d8f9cbd57e12fc437b42f9d68470e3be 100755 --- a/QDMA/linux-kernel/apps/dma-utils/Makefile +++ b/QDMA/linux-kernel/apps/dma-utils/Makefile @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-utils/dma_xfer_utils.c b/QDMA/linux-kernel/apps/dma-utils/dma_xfer_utils.c index 0dbc313ab62595fb71342429583ce854f767ed71..d3fefd26d50d10f5858a4893c6fc3093bf9a65dc 100755 --- a/QDMA/linux-kernel/apps/dma-utils/dma_xfer_utils.c +++ b/QDMA/linux-kernel/apps/dma-utils/dma_xfer_utils.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-utils/dmactl.c b/QDMA/linux-kernel/apps/dma-utils/dmactl.c index 84ef8cc72ccffc23ee047322ef7ac6bef564923b..988d482eead5156cc7d49e484472166269d454b5 100755 --- a/QDMA/linux-kernel/apps/dma-utils/dmactl.c +++ b/QDMA/linux-kernel/apps/dma-utils/dmactl.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -301,17 +301,15 @@ static int get_cmd_resp_buf_len(enum xnl_op_t op, struct xcmd_info *xcmd) case XNL_CMD_Q_STOP: case XNL_CMD_Q_DEL: case XNL_CMD_GLOBAL_CSR: - return buf_len; + return buf_len; case XNL_CMD_Q_ADD: case XNL_CMD_Q_DUMP: - case XNL_CMD_Q_CMPT_READ: - break; case XNL_CMD_Q_LIST: - buf_len = XNL_RESP_BUFLEN_MAX * 10; - break; + case XNL_CMD_Q_CMPT_READ: + break; case XNL_CMD_REG_DUMP: case XNL_CMD_REG_INFO_READ: - buf_len = XNL_RESP_BUFLEN_MAX * 6; + buf_len = XNL_RESP_BUFLEN_MAX * 6; break; case XNL_CMD_DEV_STAT: buf_len = XNL_RESP_BUFLEN_MAX; @@ -411,9 +409,11 @@ static int xnl_send_cmd(struct xnl_cb *cb, struct xnl_hdr *hdr, case XNL_CMD_DEV_INFO: case XNL_CMD_DEV_STAT: case XNL_CMD_DEV_STAT_CLEAR: - case XNL_CMD_Q_LIST: /* no parameter */ break; + case XNL_CMD_Q_LIST: + xnl_msg_add_int_attr(hdr, XNL_ATTR_QIDX, xcmd->req.qparm.idx); + xnl_msg_add_int_attr(hdr, XNL_ATTR_NUM_Q, xcmd->req.qparm.num_q); case XNL_CMD_Q_ADD: xnl_msg_add_int_attr(hdr, XNL_ATTR_QIDX, xcmd->req.qparm.idx); xnl_msg_add_int_attr(hdr, XNL_ATTR_NUM_Q, xcmd->req.qparm.num_q); diff --git a/QDMA/linux-kernel/apps/dma-utils/dmaxfer.c b/QDMA/linux-kernel/apps/dma-utils/dmaxfer.c index db94d7dea524408c4d453930cb61f2d624505982..b0c9b8ea5df0ce9d30c3295d83fcb18d2a3af2f3 100755 --- a/QDMA/linux-kernel/apps/dma-utils/dmaxfer.c +++ b/QDMA/linux-kernel/apps/dma-utils/dmaxfer.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-utils/version.h b/QDMA/linux-kernel/apps/dma-utils/version.h index 30d8b17563086ae6ab5e253bef66041b4b942593..a9ecd35a735cb2f9eee0ab0414643c09c559752a 100755 --- a/QDMA/linux-kernel/apps/dma-utils/version.h +++ b/QDMA/linux-kernel/apps/dma-utils/version.h @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -13,7 +13,7 @@ #define __DMA_UTILS_VERSION_H #define LIBNAME "dma-utils" -#define QDMATUILS_VERSION "2022.2.0" -#define COPYRIGHT "Copyright (c) 2019-2022 Xilinx Inc." +#define QDMATUILS_VERSION "2023.1.0" +#define COPYRIGHT "Copyright (c) 2022-2023 Advanced Micro Devices Inc." #endif diff --git a/QDMA/linux-kernel/apps/dma-xfer/Makefile b/QDMA/linux-kernel/apps/dma-xfer/Makefile index b89fe3bcb15c56ab0c28076937b21c3be8c589c5..f30478ae18f3a0adb2ae5e4b3d743e80d5257ae5 100755 --- a/QDMA/linux-kernel/apps/dma-xfer/Makefile +++ b/QDMA/linux-kernel/apps/dma-xfer/Makefile @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-xfer/dmaxfer.c b/QDMA/linux-kernel/apps/dma-xfer/dmaxfer.c index cab603167fe999f814a5fb48f951895423cb33dd..23945bd3ffdd9b8293b20209cde8cb5deacd8aaa 100755 --- a/QDMA/linux-kernel/apps/dma-xfer/dmaxfer.c +++ b/QDMA/linux-kernel/apps/dma-xfer/dmaxfer.c @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-xfer/sample_qdma_xfer_config.txt b/QDMA/linux-kernel/apps/dma-xfer/sample_qdma_xfer_config.txt index 5f364f063444ba370ac205fbaeaeb266944b0435..d4a2c828e65e6a6119457dd45737da8a82a205fa 100755 --- a/QDMA/linux-kernel/apps/dma-xfer/sample_qdma_xfer_config.txt +++ b/QDMA/linux-kernel/apps/dma-xfer/sample_qdma_xfer_config.txt @@ -4,7 +4,7 @@ # * to enable the user to execute the QDMA functionality # * # * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is licensed under BSD-style license (found in the # * LICENSE file in the root directory of this source tree) diff --git a/QDMA/linux-kernel/apps/dma-xfer/version.h b/QDMA/linux-kernel/apps/dma-xfer/version.h index 0f1d5ecab20e23fd61200407fab54eecd71e6949..4b5eb3933a91a2b961b5493d65baf3d1225902be 100755 --- a/QDMA/linux-kernel/apps/dma-xfer/version.h +++ b/QDMA/linux-kernel/apps/dma-xfer/version.h @@ -3,7 +3,7 @@ * to enable the user to execute the QDMA functionality * * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under BSD-style license (found in the * LICENSE file in the root directory of this source tree) @@ -12,7 +12,7 @@ #define __DMA_XFER_VERSION_H #define PROGNAME "dma-xfer" -#define VERSION "2022.2.0" -#define COPYRIGHT "Copyright (c) 2019-2022 Xilinx Inc." +#define VERSION "2023.1.0" +#define COPYRIGHT "Copyright (c) 2022-2023 Advanced Micro Devices Inc." #endif diff --git a/QDMA/linux-kernel/apps/include/qdma_nl.h b/QDMA/linux-kernel/apps/include/qdma_nl.h index 09d7ad1ecfd65e850b7393858a022902e53a1441..fd8b43cd8696b573b6249d1284e0a370491e1c67 100755 --- a/QDMA/linux-kernel/apps/include/qdma_nl.h +++ b/QDMA/linux-kernel/apps/include/qdma_nl.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under both the BSD-style license (found in the * LICENSE file in the root directory of this source tree) and the GPLv2 (found diff --git a/QDMA/linux-kernel/apps/include/qdma_user_reg_dump.h b/QDMA/linux-kernel/apps/include/qdma_user_reg_dump.h index 337ce81af5b8ccaf67c5cc0a36b162d5817c4180..4e833732cb6486b9a477274f75e1f83466d2fe75 100755 --- a/QDMA/linux-kernel/apps/include/qdma_user_reg_dump.h +++ b/QDMA/linux-kernel/apps/include/qdma_user_reg_dump.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under both the BSD-style license (found in the * LICENSE file in the root directory of this source tree) and the GPLv2 (found diff --git a/QDMA/linux-kernel/apps/include/xdev_regs.h b/QDMA/linux-kernel/apps/include/xdev_regs.h index feebb98d264e39190a6bc8195283ae7f7a042909..1434dce3a48757786314ef5b47c2aa03e5536190 100755 --- a/QDMA/linux-kernel/apps/include/xdev_regs.h +++ b/QDMA/linux-kernel/apps/include/xdev_regs.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under both the BSD-style license (found in the * LICENSE file in the root directory of this source tree) and the GPLv2 (found diff --git a/QDMA/linux-kernel/bsd_license.txt b/QDMA/linux-kernel/bsd_license.txt index 0759917fc0c0afba4f88552de1e5a6c4022fca20..20693b4e5706ac76a6c8481b41200a537db06e55 100755 --- a/QDMA/linux-kernel/bsd_license.txt +++ b/QDMA/linux-kernel/bsd_license.txt @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is licensed under both the BSD-style license (found in the * LICENSE file in the root directory of this source tree) and the GPLv2 (found diff --git a/QDMA/linux-kernel/driver/Makefile b/QDMA/linux-kernel/driver/Makefile index 9b8e6a39b18df8be7e7a3650262d81cc283f4241..87206816a24aee3c1c0ef28d3ecb9d2d84acfff6 100755 --- a/QDMA/linux-kernel/driver/Makefile +++ b/QDMA/linux-kernel/driver/Makefile @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/include/qdma_nl.h b/QDMA/linux-kernel/driver/include/qdma_nl.h index eaa10d74b8179c4590abdff40dbda499f6848c52..e0801c9e78976b02fd52c228353517ea0fa93f2a 100755 --- a/QDMA/linux-kernel/driver/include/qdma_nl.h +++ b/QDMA/linux-kernel/driver/include/qdma_nl.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/include/qdma_user_reg_dump.h b/QDMA/linux-kernel/driver/include/qdma_user_reg_dump.h index 89758251109dd523dfbc029efaabe05fd57650e7..80906ceee68e1db6de404b2376b46e89c08e2dfa 100755 --- a/QDMA/linux-kernel/driver/include/qdma_user_reg_dump.h +++ b/QDMA/linux-kernel/driver/include/qdma_user_reg_dump.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/include/xdev_regs.h b/QDMA/linux-kernel/driver/include/xdev_regs.h index 73091dccbbc65b2ed3e8afaff0839201d93aaa82..c1c198dfe4c7d1fcb3e4a31209922c88fad6b986 100755 --- a/QDMA/linux-kernel/driver/include/xdev_regs.h +++ b/QDMA/linux-kernel/driver/include/xdev_regs.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2018-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/libqdma/libqdma_export.c b/QDMA/linux-kernel/driver/libqdma/libqdma_export.c index 9add26fe9bb3ebdaf5ae266ca5c2ca27508d2aa2..b37f1fb6e91e1926e31a7ad9c8208b213f3763e2 100755 --- a/QDMA/linux-kernel/driver/libqdma/libqdma_export.c +++ b/QDMA/linux-kernel/driver/libqdma/libqdma_export.c @@ -1131,6 +1131,8 @@ int qdma_queue_config(unsigned long dev_hndl, unsigned long qid, * qdma_queue_list() - display all configured queues in a string buffer * * @param[in] dev_hndl: dev_hndl returned from qdma_device_open() + * @param[in] qidx: Queue index + * @param[in] num_q: Number of Queues to list * @param[in] buflen: length of the input buffer * @param[out] buf: message buffer * @@ -1138,7 +1140,8 @@ int qdma_queue_config(unsigned long dev_hndl, unsigned long qid, * otherwise 0 * @return <0: error *****************************************************************************/ -int qdma_queue_list(unsigned long dev_hndl, char *buf, int buflen) +int qdma_queue_list(unsigned long dev_hndl, int qidx, int num_q, char *buf, + int buflen) { struct xlnx_dma_dev *xdev = (struct xlnx_dma_dev *)dev_hndl; struct qdma_dev *qdev; @@ -1202,7 +1205,8 @@ int qdma_queue_list(unsigned long dev_hndl, char *buf, int buflen) */ if (h2c_qcnt) { descq = qdev->h2c_descq; - for (i = 0; i < h2c_qcnt; i++, descq++) { + descq = descq + qidx; + for (i = qidx; i < (qidx + num_q); i++, descq++) { lock_descq(descq); if (descq->q_state != Q_STATE_DISABLED) cur += @@ -1216,7 +1220,8 @@ int qdma_queue_list(unsigned long dev_hndl, char *buf, int buflen) if (c2h_qcnt) { descq = qdev->c2h_descq; - for (i = 0; i < c2h_qcnt; i++, descq++) { + descq = descq + qidx; + for (i = qidx; i < (qidx + num_q); i++, descq++) { lock_descq(descq); if (descq->q_state != Q_STATE_DISABLED) cur += @@ -1230,7 +1235,8 @@ int qdma_queue_list(unsigned long dev_hndl, char *buf, int buflen) if (cmpt_qcnt) { descq = qdev->cmpt_descq; - for (i = 0; i < cmpt_qcnt; i++, descq++) { + descq = descq + qidx; + for (i = qidx; i < (qidx + num_q); i++, descq++) { lock_descq(descq); if (descq->q_state != Q_STATE_DISABLED) cur += @@ -2304,7 +2310,7 @@ void sgl_unmap(struct pci_dev *pdev, struct qdma_sw_sg *sg, unsigned int sgcnt, if (!sg->pg) break; if (sg->dma_addr) { - pci_unmap_page(pdev, sg->dma_addr - sg->offset, + dma_unmap_page(&pdev->dev, sg->dma_addr - sg->offset, PAGE_SIZE, dir); sg->dma_addr = 0UL; } @@ -2336,8 +2342,9 @@ int sgl_map(struct pci_dev *pdev, struct qdma_sw_sg *sgl, unsigned int sgcnt, */ for (i = 0; i < sgcnt; i++, sg++) { /* !! TODO page size !! */ - sg->dma_addr = pci_map_page(pdev, sg->pg, 0, PAGE_SIZE, dir); - if (unlikely(pci_dma_mapping_error(pdev, sg->dma_addr))) { + sg->dma_addr = dma_map_page(&pdev->dev, sg->pg, 0, PAGE_SIZE, + dir); + if (unlikely(dma_mapping_error(&pdev->dev, sg->dma_addr))) { pr_err("map sgl failed, sg %d, %u.\n", i, sg->len); if (i) sgl_unmap(pdev, sgl, i, dir); diff --git a/QDMA/linux-kernel/driver/libqdma/libqdma_export.h b/QDMA/linux-kernel/driver/libqdma/libqdma_export.h index 2cf6c2738d4fa38ee734c5d58232db2f189d74c7..a60ff3ec5896794f0a917526ca17d5304d5c622c 100755 --- a/QDMA/linux-kernel/driver/libqdma/libqdma_export.h +++ b/QDMA/linux-kernel/driver/libqdma/libqdma_export.h @@ -1352,7 +1352,8 @@ int qdma_queue_get_config(unsigned long dev_hndl, unsigned long id, * otherwise QDMA_OPERATION_SUCCESSFUL and <0 for error * *****************************************************************************/ -int qdma_queue_list(unsigned long dev_hndl, char *buf, int buflen); +int qdma_queue_list(unsigned long dev_hndl, int qidx, int num_q, char *buf, + int buflen); /*****************************************************************************/ /** diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_cpm5_access/eqdma_cpm5_access.c b/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_cpm5_access/eqdma_cpm5_access.c index 239105bf3aa35a08de98ae90970a212f1fa2aa6c..29c3cac146ffebce8d74615ee0872a9d9479d2cb 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_cpm5_access/eqdma_cpm5_access.c +++ b/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_cpm5_access/eqdma_cpm5_access.c @@ -83,9 +83,11 @@ #define EQDMA_CPM5_GLBL2_FLR_PRESENT_MASK BIT(1) #define EQDMA_CPM5_GLBL2_MAILBOX_EN_MASK BIT(0) + +/* TODO: This is work around and this needs to be auto generated from ODS */ /** EQDMA_CPM5_IND_REG_SEL_FMAP */ -#define EQDMA_CPM5_FMAP_CTXT_W1_QID_MAX_MASK GENMASK(11, 0) -#define EQDMA_CPM5_FMAP_CTXT_W0_QID_MASK GENMASK(10, 0) +#define EQDMA_CPM5_FMAP_CTXT_W1_QID_MAX_MASK GENMASK(12, 0) +#define EQDMA_CPM5_FMAP_CTXT_W0_QID_MASK GENMASK(11, 0) static void eqdma_cpm5_hw_st_h2c_err_process(void *dev_hndl); static void eqdma_cpm5_hw_st_c2h_err_process(void *dev_hndl); diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c b/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c index 19105c153908bbd206abf2aea4d1cacdc9c045e6..59051a8ea28c0486f9a93f8af14a5594a8923e2d 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c +++ b/QDMA/linux-kernel/driver/libqdma/qdma_access/eqdma_soft_access/eqdma_soft_access.c @@ -63,10 +63,15 @@ #define EQDMA5_H2C_THROT_REQ_THRESH 0xC0 /* CSR Default values for QDMA 5.0 */ -#define EQDMA5_DEFAULT_H2C_UODSC_LIMIT 4 -#define EQDMA5_DEFAULT_MAX_DSC_FETCH 3 +#define EQDMA5_DEFAULT_C2H_UODSC_LIMIT 5 +#define EQDMA5_DEFAULT_H2C_UODSC_LIMIT 8 +#define EQDMA5_DEFAULT_MAX_DSC_FETCH 5 #define EQDMA5_DEFAULT_WRB_INT QDMA_WRB_INTERVAL_128 +/* C2H prefetch Throttle configuration. */ +#define EQDMA5_DEFAULT_C2H_EVT_QCNT_TH 0x38 +#define EQDMA5_DEFAULT_C2H_PFCH_QCNT 0x3c + /** Auxillary Bitmasks for fields spanning multiple words */ #define EQDMA_SW_CTXT_PASID_GET_H_MASK GENMASK(21, 12) #define EQDMA_SW_CTXT_PASID_GET_L_MASK GENMASK(11, 0) @@ -2153,6 +2158,8 @@ int eqdma_set_default_global_csr(void *dev_hndl) * is same except some performance optimizations */ reg_val = + FIELD_SET(GLBL_DSC_CFG_C2H_UODSC_LIMIT_MASK, + EQDMA5_DEFAULT_C2H_UODSC_LIMIT) | FIELD_SET(GLBL_DSC_CFG_H2C_UODSC_LIMIT_MASK, EQDMA5_DEFAULT_H2C_UODSC_LIMIT) | FIELD_SET(GLBL_DSC_CFG_MAXFETCH_MASK, @@ -2174,12 +2181,21 @@ int eqdma_set_default_global_csr(void *dev_hndl) QDMA_NUM_C2H_BUFFER_SIZES, buf_sz); /* Prefetch Configuration */ - reg_val = qdma_reg_read(dev_hndl, - EQDMA_C2H_PFCH_CACHE_DEPTH_ADDR); - cfg_val = FIELD_GET(C2H_PFCH_CACHE_DEPTH_MASK, reg_val); - reg_val = FIELD_SET(C2H_PFCH_CFG_1_QCNT_MASK, (cfg_val >> 2)) | - FIELD_SET(C2H_PFCH_CFG_1_EVT_QCNT_TH_MASK, + if (eqdma_ip_version == EQDMA_IP_VERSION_4) { + reg_val = qdma_reg_read(dev_hndl, + EQDMA_C2H_PFCH_CACHE_DEPTH_ADDR); + cfg_val = FIELD_GET(C2H_PFCH_CACHE_DEPTH_MASK, reg_val); + reg_val = FIELD_SET(C2H_PFCH_CFG_1_QCNT_MASK, + (cfg_val >> 2)) | + FIELD_SET(C2H_PFCH_CFG_1_EVT_QCNT_TH_MASK, ((cfg_val >> 2) - 4)); + } else { + /* Performance optimization for EQDMA5.0. */ + reg_val = FIELD_SET(C2H_PFCH_CFG_1_QCNT_MASK, + EQDMA5_DEFAULT_C2H_PFCH_QCNT) | + FIELD_SET(C2H_PFCH_CFG_1_EVT_QCNT_TH_MASK, + EQDMA5_DEFAULT_C2H_EVT_QCNT_TH); + } qdma_reg_write(dev_hndl, EQDMA_C2H_PFCH_CFG_1_ADDR, reg_val); reg_val = qdma_reg_read(dev_hndl, EQDMA_C2H_PFCH_CFG_2_ADDR); diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_common.h b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_common.h index 00f6bb6d27e73086ebd883836db596696d1dee6b..f88c015d9b7d61f96b9181152a7a9b2994d1c726 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_common.h +++ b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_common.h @@ -82,10 +82,17 @@ static inline uint32_t get_trailing_zeros(uint64_t value) #define DEFAULT_PFCH_NUM_ENTRIES_PER_Q 8 #define DEFAULT_PFCH_MAX_Q_CNT 16 #define DEFAULT_C2H_INTR_TIMER_TICK 25 -#define DEFAULT_CMPT_COAL_TIMER_CNT 5 #define DEFAULT_CMPT_COAL_TIMER_TICK 25 #define DEFAULT_CMPT_COAL_MAX_BUF_SZ 32 +#ifdef THROUGHPUT_MEASUREMENT +/* Update WRB coalesce timer count for throughput measurement */ +#define DEFAULT_CMPT_COAL_TIMER_CNT 10 +#else +/* Update WRB coalesce timer count for low latency measurement */ +#define DEFAULT_CMPT_COAL_TIMER_CNT 5 +#endif + #define QDMA_BAR_NUM 6 /** Maximum data vectors to be used for each function diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_version.h b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_version.h index c560b46f7ca1a2e40fe07186ffffb40eaf5c7cca..311e9468e1426f739af9b94a278e5b0eb58276cc 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_version.h +++ b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_access_version.h @@ -19,9 +19,9 @@ #define __QDMA_ACCESS_VERSION_H_ -#define QDMA_VERSION_MAJOR 2022 +#define QDMA_VERSION_MAJOR 2023 #define QDMA_VERSION_MINOR 1 -#define QDMA_VERSION_PATCH 5 +#define QDMA_VERSION_PATCH 0 #define QDMA_VERSION_STR \ __stringify(QDMA_VERSION_MAJOR) "." \ diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_platform.h b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_platform.h index a6c7d1cc5c6ae84693b7fe725716a26ea11fb457..996b891686402d60ff3429d8d031dbd34d927c6a 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_platform.h +++ b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_platform.h @@ -162,6 +162,14 @@ void qdma_strncpy(char *dest, const char *src, size_t n); *****************************************************************************/ int qdma_get_err_code(int acc_err_code); +/*****************************************************************************/ +/** + * qdma_io_wmb() - Write memory barrier for IO device + * + * Return: 0 - success and < 0 - failure + *****************************************************************************/ +int qdma_io_wmb(void); + #ifdef __cplusplus } #endif diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_soft_access/qdma_soft_access.c b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_soft_access/qdma_soft_access.c index 26d10b27e4ef8ab9c27ddf3c8bdb2380f9adbccd..a7b3467f99b849a264dd9288ed112e6484cc245a 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_soft_access/qdma_soft_access.c +++ b/QDMA/linux-kernel/driver/libqdma/qdma_access/qdma_soft_access/qdma_soft_access.c @@ -4033,6 +4033,11 @@ int qdma_queue_pidx_update(void *dev_hndl, uint8_t is_vf, uint16_t qid, FIELD_SET(QDMA_DMA_SEL_IRQ_EN_MASK, reg_info->irq_en); + /* Make sure writes to the H2C/C2H descriptors are synchronized + * before updating PIDX + */ + qdma_io_wmb(); + qdma_reg_write(dev_hndl, reg_addr, reg_val); return QDMA_SUCCESS; @@ -4085,6 +4090,11 @@ int qdma_queue_cmpt_cidx_update(void *dev_hndl, uint8_t is_vf, reg_info->wrb_en) | FIELD_SET(QDMA_DMAP_SEL_CMPT_IRQ_EN_MASK, reg_info->irq_en); + /* Make sure writes to the CMPT ring are synchronized + * before updating CIDX + */ + qdma_io_wmb(); + qdma_reg_write(dev_hndl, reg_addr, reg_val); return QDMA_SUCCESS; diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_descq.c b/QDMA/linux-kernel/driver/libqdma/qdma_descq.c index f62a9275aa1527e6419ba37a7aa27a6bf3eeda94..db8e44e50fe9637667760c0fb98334200135b8ff 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_descq.c +++ b/QDMA/linux-kernel/driver/libqdma/qdma_descq.c @@ -1876,6 +1876,8 @@ int qdma_queue_packet_write(unsigned long dev_hndl, unsigned long id, return -EINVAL; } + memset(cb, 0, QDMA_REQ_OPAQUE_SIZE); + qdma_waitq_init(&cb->wq); qdma_work_queue_add(descq, cb); if (!req->dma_mapped) { diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_device.c b/QDMA/linux-kernel/driver/libqdma/qdma_device.c index a0ea5fcd532fff064334d6d5d1b2ccbc0a1a21d3..fcf80581d0f56a60ab6037fb50e28714a5eb99f8 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_device.c +++ b/QDMA/linux-kernel/driver/libqdma/qdma_device.c @@ -253,7 +253,6 @@ int qdma_device_init(struct xlnx_dma_dev *xdev) } #endif - descq = (struct qdma_descq *)(qdev + 1); qdev->h2c_descq = kmalloc(sizeof(struct qdma_descq) * qmax, GFP_KERNEL); qdev->c2h_descq = kmalloc(sizeof(struct qdma_descq) * qmax, GFP_KERNEL); qdev->cmpt_descq = kmalloc(sizeof(struct qdma_descq) * qmax, diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_intr.c b/QDMA/linux-kernel/driver/libqdma/qdma_intr.c index 14e88ca4e7930a637ee109847bf2f49ed7dd8428..4de926846f4c14278ec31342ddc03b2091c0ffd1 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_intr.c +++ b/QDMA/linux-kernel/driver/libqdma/qdma_intr.c @@ -116,7 +116,7 @@ static irqreturn_t user_intr_handler(int irq_index, int irq, void *dev_id) { struct xlnx_dma_dev *xdev = dev_id; - pr_info("User IRQ fired on Funtion#%d: index=%d, vector=%d\n", + pr_debug("User IRQ fired on Funtion#%d: index=%d, vector=%d\n", xdev->func_id, irq_index, irq); if (xdev->conf.fp_user_isr_handler) { diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_platform.c b/QDMA/linux-kernel/driver/libqdma/qdma_platform.c index 2f1470f67d52b66022cd6de8af21311955e35352..d008d92adaf14b5d7461226e342661f9165dd7f1 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_platform.c +++ b/QDMA/linux-kernel/driver/libqdma/qdma_platform.c @@ -130,3 +130,16 @@ int qdma_get_err_code(int acc_err_code) acc_err_code *= -1; return -(error_code_map_list[acc_err_code].err_code); } + +int qdma_io_wmb(void) +{ + /* + * TODO: Write memory barrier(wmb) calls are happening differently + * for DPDK and Linux drivers. DPDK driver is calling wmb() before + * pidx/cmpt_cidx updates, where as linux driver calls wmb() after + * pidx/cmpt_cidx updates. As linux driver performance numbers + * are good with current changes, so keeping this function + * as place holder for furure changes related to memory barriers. + */ + return 0; +} diff --git a/QDMA/linux-kernel/driver/libqdma/qdma_st_c2h.c b/QDMA/linux-kernel/driver/libqdma/qdma_st_c2h.c index fe3355ed13e32f24df9d857be5dea4857d01d9af..80a8d739720b421075b633630261ff28995652d7 100755 --- a/QDMA/linux-kernel/driver/libqdma/qdma_st_c2h.c +++ b/QDMA/linux-kernel/driver/libqdma/qdma_st_c2h.c @@ -216,7 +216,7 @@ static inline int flq_fill_page_one(struct qdma_sw_pg_sg *pg_sdesc, } mapping = dma_map_page(dev, pg, 0, (PAGE_SIZE << pg_order), - PCI_DMA_FROMDEVICE); + DMA_FROM_DEVICE); if (unlikely(dma_mapping_error(dev, mapping))) { dev_err(dev, "page 0x%p mapping error 0x%llx.\n", pg, (unsigned long long)mapping); diff --git a/QDMA/linux-kernel/driver/libqdma/version.h b/QDMA/linux-kernel/driver/libqdma/version.h index 5d9a25ac6c0553e2226776caf5ba77e051e32d48..2246946a74d1d6872a2aca64fb0dbf8ba0c4e31e 100755 --- a/QDMA/linux-kernel/driver/libqdma/version.h +++ b/QDMA/linux-kernel/driver/libqdma/version.h @@ -23,9 +23,9 @@ #define LIBQDMA_MODULE_NAME "libqdma" #define LIBQDMA_MODULE_DESC "Xilinx QDMA Library" -#define LIBQDMA_VERSION_MAJOR 2022 +#define LIBQDMA_VERSION_MAJOR 2023 #define LIBQDMA_VERSION_MINOR 1 -#define LIBQDMA_VERSION_PATCH 5 +#define LIBQDMA_VERSION_PATCH 0 #define LIBQDMA_VERSION_STR \ __stringify(LIBQDMA_VERSION_MAJOR) "." \ diff --git a/QDMA/linux-kernel/driver/libqdma/xdev.c b/QDMA/linux-kernel/driver/libqdma/xdev.c index 3ef679e5351420b9032afcba4a719684aa75755f..9f0d6940e409f0a69dd196fb1c72c60ddfe9e1d4 100755 --- a/QDMA/linux-kernel/driver/libqdma/xdev.c +++ b/QDMA/linux-kernel/driver/libqdma/xdev.c @@ -96,12 +96,13 @@ struct qdma_resource_lock { static int pci_dma_mask_set(struct pci_dev *pdev) { /** 64-bit addressing capability for XDMA? */ - if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { + + if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64))) { /** use 64-bit DMA for descriptors */ - pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); /** use 64-bit DMA, 32-bit for consistent */ - } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) { - pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); + } else if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(32))) { + dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); /** use 32-bit DMA */ dev_info(&pdev->dev, "Using a 32-bit DMA mask.\n"); } else { @@ -905,7 +906,7 @@ int qdma_device_online(struct pci_dev *pdev, unsigned long dev_hndl, int reset) xdev->err_mon_cancel = 0; INIT_DELAYED_WORK(&xdev->err_mon, qdma_err_mon); schedule_delayed_work(&xdev->err_mon, - msecs_to_jiffies(1000)); + msecs_to_jiffies(1000)); } /** @@ -1159,8 +1160,6 @@ int qdma_device_open(const char *mod_name, struct qdma_dev_conf *conf, goto unmap_bars; } - memcpy(conf, &xdev->conf, sizeof(*conf)); - rv = qdma_device_online(pdev, (unsigned long)xdev, XDEV_FLR_INACTIVE); if (rv < 0) { pr_warn("Failed to set the dma device online, err = %d", rv); @@ -1173,6 +1172,8 @@ int qdma_device_open(const char *mod_name, struct qdma_dev_conf *conf, goto unmap_bars; } + memcpy(conf, &xdev->conf, sizeof(*conf)); + pr_info("%s, %05x, pdev 0x%p, xdev 0x%p, ch %u, q %u, vf %u.\n", dev_name(&pdev->dev), xdev->conf.bdf, pdev, xdev, xdev->dev_cap.mm_channel_max, conf->qsets_max, conf->vf_max); diff --git a/QDMA/linux-kernel/driver/make_rules/common_flags.mk b/QDMA/linux-kernel/driver/make_rules/common_flags.mk index 5929b0c2a19603f0906a28b9acad1a888f8a9ea2..69bebdedfd55a2b1ac50c1cd56b939e1997497b6 100755 --- a/QDMA/linux-kernel/driver/make_rules/common_flags.mk +++ b/QDMA/linux-kernel/driver/make_rules/common_flags.mk @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/make_rules/distro_check.mk b/QDMA/linux-kernel/driver/make_rules/distro_check.mk index 104c2885460572d3fd8cef0c346b21a81086f7d7..0f23d3568328b2492690bc70f98be4b27d612d7d 100755 --- a/QDMA/linux-kernel/driver/make_rules/distro_check.mk +++ b/QDMA/linux-kernel/driver/make_rules/distro_check.mk @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/make_rules/kernel_check.mk b/QDMA/linux-kernel/driver/make_rules/kernel_check.mk index c9a1f0bf4fafee7f5b4e0f4760ca0f9e5c4121aa..ab2b369827038dea1cbc60f6213341796dd141a1 100755 --- a/QDMA/linux-kernel/driver/make_rules/kernel_check.mk +++ b/QDMA/linux-kernel/driver/make_rules/kernel_check.mk @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/src/Makefile b/QDMA/linux-kernel/driver/src/Makefile index fcbe5772137ad2649342fb689e863fb02baf1ba1..1b5b9bd07dff1e25b6f4111cf440ed95c6a36193 100755 --- a/QDMA/linux-kernel/driver/src/Makefile +++ b/QDMA/linux-kernel/driver/src/Makefile @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/src/cdev.c b/QDMA/linux-kernel/driver/src/cdev.c index 2a7de5bc95760e9828ee2aa5fe171fb3edf320d2..e341be7602e0476131f846ef0fe72bf1b3a66dc2 100755 --- a/QDMA/linux-kernel/driver/src/cdev.c +++ b/QDMA/linux-kernel/driver/src/cdev.c @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/src/cdev.h b/QDMA/linux-kernel/driver/src/cdev.h index 616aec89f76141e9e25e95caf422ac8eda35281b..371e52801bb72cf308782839ee73020f123347c1 100755 --- a/QDMA/linux-kernel/driver/src/cdev.h +++ b/QDMA/linux-kernel/driver/src/cdev.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/src/nl.c b/QDMA/linux-kernel/driver/src/nl.c index 55812f10aab7339836e5a04b96b301ec2e963f2a..45dbc948065c83b18cc065da3f16389fa77fcae0 100755 --- a/QDMA/linux-kernel/driver/src/nl.c +++ b/QDMA/linux-kernel/driver/src/nl.c @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -1548,9 +1548,14 @@ static int xnl_q_list(struct sk_buff *skb2, struct genl_info *info) struct xlnx_pci_dev *xpdev; char *buf; int rv = 0; + char ebuf[XNL_RESP_BUFLEN_MIN]; + struct qdma_queue_conf qconf; + unsigned char is_qp; uint32_t qmax = 0; uint32_t buflen = 0, max_buflen = 0; struct qdma_queue_count q_count; + unsigned int qidx, num_q; + struct xlnx_qdata *qdata; if (info == NULL) return -EINVAL; @@ -1565,6 +1570,12 @@ static int xnl_q_list(struct sk_buff *skb2, struct genl_info *info) if (!buf) return -ENOMEM; buflen = XNL_RESP_BUFLEN_MIN; + rv = qconf_get(&qconf, info, ebuf, XNL_RESP_BUFLEN_MIN, &is_qp); + if (rv < 0) + return rv; + + qidx = qconf.qidx; + num_q = nla_get_u32(info->attrs[XNL_ATTR_NUM_Q]); rv = qdma_get_queue_count(xpdev->dev_hndl, &q_count, buf, buflen); if (rv < 0) { @@ -1574,20 +1585,33 @@ static int xnl_q_list(struct sk_buff *skb2, struct genl_info *info) } qmax = q_count.h2c_qcnt + q_count.c2h_qcnt; - if (!qmax) { rv += snprintf(buf, 8, "Zero Qs\n\n"); goto send_rsp; } - max_buflen = (qmax * QDMA_Q_LIST_LINE_SZ); + qdata = xnl_rcv_check_qidx(info, xpdev, &qconf, buf, buflen); + if (!qdata) + goto send_rsp; + + num_q = nla_get_u32(info->attrs[XNL_ATTR_NUM_Q]); + + if (num_q > QDMA_Q_DUMP_MAX_QUEUES) { + pr_err("Can not dump more than %d queues\n", + QDMA_Q_DUMP_MAX_QUEUES); + rv += snprintf(buf, 40, "Can not dump more than %d queues\n", + QDMA_Q_DUMP_MAX_QUEUES); + goto send_rsp; + } + kfree(buf); + max_buflen = (num_q * 2 * QDMA_Q_LIST_LINE_SZ); buf = xnl_mem_alloc(max_buflen, info); if (!buf) return -ENOMEM; buflen = max_buflen; - rv = qdma_queue_list(xpdev->dev_hndl, buf, buflen); + rv = qdma_queue_list(xpdev->dev_hndl, qidx, num_q, buf, buflen); if (rv < 0) { pr_err("qdma_queue_list() failed: %d", rv); goto send_rsp; @@ -1673,8 +1697,16 @@ add_q: } } } - - cur += snprintf(cur, end - cur, "Added %u Queues.\n", i); +/* Suppress Q additions prints if num_q's greater than 2048. + * And print only consolidated Q's added, to overcome attr failure. + * TODO: This is a workaround. Need to comeup with proper fix. + */ + if (num_q > 2048) { + memset(buf, 0, strlen(buf) + 1); + snprintf(buf, 25, "Added %u Queues.\n", i); + } else { + cur += snprintf(cur, end - cur, "Added %u Queues.\n", i); + } send_resp: rv2 = xnl_respond_buffer(info, buf, strlen(buf), rv); diff --git a/QDMA/linux-kernel/driver/src/nl.h b/QDMA/linux-kernel/driver/src/nl.h index 40d91f212fe0dbce828600ed89f31245283692d6..e1d4024559a7975b3a6ba04e5ab21d1cb7408c8e 100755 --- a/QDMA/linux-kernel/driver/src/nl.h +++ b/QDMA/linux-kernel/driver/src/nl.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/src/pci_ids.h b/QDMA/linux-kernel/driver/src/pci_ids.h index 141104565f237522887e24eb9a519905dbb1ffb8..61a3da1eb5529fe4d646ec9135e7dd9ca3d554db 100755 --- a/QDMA/linux-kernel/driver/src/pci_ids.h +++ b/QDMA/linux-kernel/driver/src/pci_ids.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/src/qdma_mod.c b/QDMA/linux-kernel/driver/src/qdma_mod.c index ae2a9237aa0bc1ff98684c9c7b8cdd76d1bb5dda..11791f97841ba096f65996934220ac9c2bc02af0 100755 --- a/QDMA/linux-kernel/driver/src/qdma_mod.c +++ b/QDMA/linux-kernel/driver/src/qdma_mod.c @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/src/qdma_mod.h b/QDMA/linux-kernel/driver/src/qdma_mod.h index 079d95a9e0bc43605204d62989a634e88e479808..3cd04a51136fe1a9462cb80cacea2504428b25c4 100755 --- a/QDMA/linux-kernel/driver/src/qdma_mod.h +++ b/QDMA/linux-kernel/driver/src/qdma_mod.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/driver/src/version.h b/QDMA/linux-kernel/driver/src/version.h index 5906c95997f3d43c899a2f314ecdf1ebf2514811..2b97f6634faaa36e8919eee83567ac6d05bdbb75 100755 --- a/QDMA/linux-kernel/driver/src/version.h +++ b/QDMA/linux-kernel/driver/src/version.h @@ -2,7 +2,7 @@ * This file is part of the Xilinx DMA IP Core driver for Linux * * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. - * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. + * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. * * This source code is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -29,11 +29,11 @@ #define DRV_MODULE_NAME "qdma-pf" #define DRV_MODULE_DESC "Xilinx QDMA PF Reference Driver" #endif /* #ifdef __QDMA_VF__ */ -#define DRV_MODULE_RELDATE "Jun 2022" +#define DRV_MODULE_RELDATE "Jan 2023" -#define DRV_MOD_MAJOR 2022 +#define DRV_MOD_MAJOR 2023 #define DRV_MOD_MINOR 1 -#define DRV_MOD_PATCHLEVEL 5 +#define DRV_MOD_PATCHLEVEL 0 #define DRV_MODULE_VERSION \ __stringify(DRV_MOD_MAJOR) "." \ diff --git a/QDMA/linux-kernel/scripts/qdma_generate_conf_file.sh b/QDMA/linux-kernel/scripts/qdma_generate_conf_file.sh index 07d5b3ac4cfa2424a2aa2bbe4eca60c81c782389..c66cb1ad20a1740fbae0334ecee932744cc369b6 100755 --- a/QDMA/linux-kernel/scripts/qdma_generate_conf_file.sh +++ b/QDMA/linux-kernel/scripts/qdma_generate_conf_file.sh @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/scripts/qdma_run_test_mm_vf.sh b/QDMA/linux-kernel/scripts/qdma_run_test_mm_vf.sh index de584fe5e1443e938429dfc29f4ad7ac05227a75..1692277c444be5d980bfaaec477a4bb6e570433d 100755 --- a/QDMA/linux-kernel/scripts/qdma_run_test_mm_vf.sh +++ b/QDMA/linux-kernel/scripts/qdma_run_test_mm_vf.sh @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/scripts/qdma_run_test_pf.sh b/QDMA/linux-kernel/scripts/qdma_run_test_pf.sh index d328ec93e7e3a9b8557c4569f179fe3edc022a89..f49bead3db29113d7dc2ea909c756998d695dca6 100755 --- a/QDMA/linux-kernel/scripts/qdma_run_test_pf.sh +++ b/QDMA/linux-kernel/scripts/qdma_run_test_pf.sh @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/scripts/qdma_run_test_st_vf.sh b/QDMA/linux-kernel/scripts/qdma_run_test_st_vf.sh index a9b620d32c6f0eb74c9ff3a35fa732b69bfe5820..754a408423338d4e923fb73ab4b472c12677987a 100755 --- a/QDMA/linux-kernel/scripts/qdma_run_test_st_vf.sh +++ b/QDMA/linux-kernel/scripts/qdma_run_test_st_vf.sh @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License, diff --git a/QDMA/linux-kernel/scripts/qdma_vf_auto_tst.sh b/QDMA/linux-kernel/scripts/qdma_vf_auto_tst.sh index bcb84d71e61916de60f44ddbe97e9c28810fcd10..4d7fed150331635b493658c2062d5fcfc01e2dce 100755 --- a/QDMA/linux-kernel/scripts/qdma_vf_auto_tst.sh +++ b/QDMA/linux-kernel/scripts/qdma_vf_auto_tst.sh @@ -2,7 +2,7 @@ # * This file is part of the Xilinx DMA IP Core driver for Linux # * # * Copyright (c) 2017-2022, Xilinx, Inc. All rights reserved. -# * Copyright (c) 2022, Advanced Micro Devices, Inc. All rights reserved. +# * Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. # * # * This source code is free software; you can redistribute it and/or modify it # * under the terms and conditions of the GNU General Public License,