verifier: remove useless stuff

Signed-off-by: Alban Gruin <alban.gruin@irit.fr>

src/verifier.sv

@@ -43,6 +43,7 @@ module verifier #(
   // assign should_lock_icache_o = has_mem_access & icache_miss_i;
   assign should_lock_icache_o = has_mem_access | if_has_cf_i | id_has_cf_i | is_has_cf_i;
 
+  //pragma translate off
   // CO
   logic [NR_COMMIT_PORTS-1:0][BITS_ENTRIES-1:0]          commit_id_n, commit_id_q;
   logic [NR_COMMIT_PORTS-1:0]       commit_correct;
@@ -74,7 +75,6 @@ module verifier #(
     end
   end
 
-  //pragma translate off
   `ifndef VERILATOR
   initial begin
     assert (NR_ENTRIES == 2**BITS_ENTRIES) else $fatal ("NR_ENTRIES is not a power of 2");
@@ -85,10 +85,6 @@ module verifier #(
       @(posedge clk_i) disable iff (!rst_ni) commit_ack_i[i] |-> commit_correct[i])
       else $warning (1,"Invalid commit");
   end
-
-  assert property (
-    @(posedge clk_i) disable iff (!rst_ni) ~should_lock_icache_o)
-    else $warning (1,"Concurrent access on the bus");
   `endif
   //pragma translate on