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0abb1a6d

Unverified Commit 0abb1a6d authored 4 years ago by sébastien jacq Committed by GitHub 4 years ago

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Merge pull request #5 from sjthales/master

add ddr support

parents 5965c3da 04ce150d

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Pipeline #461 failed 3 years ago

Stage: build

Stage: write-back

Stage: write-through

Changes 13
Pipelines 1

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Makefile 12 additions, 6 deletions

Makefile
README.md 8 additions, 17 deletions

README.md
fpga/Makefile 6 additions, 7 deletions

fpga/Makefile
fpga/constraints/cva6_fpga.xdc 1 addition, 32 deletions

fpga/constraints/cva6_fpga.xdc
fpga/scripts/get_hs2_sn.tcl 0 additions, 8 deletions

fpga/scripts/get_hs2_sn.tcl
fpga/scripts/program_cva6_fpga.tcl 15 additions, 12 deletions

fpga/scripts/program_cva6_fpga.tcl
fpga/scripts/ps7_init.tcl 814 additions, 0 deletions

fpga/scripts/ps7_init.tcl
fpga/scripts/run_cva6_fpga.tcl 19 additions, 4 deletions

fpga/scripts/run_cva6_fpga.tcl
fpga/src/cva6_zybo_z7_20.sv 118 additions, 1 deletion

fpga/src/cva6_zybo_z7_20.sv
fpga/src/zybo-z7-20-ddr.svh 19 additions, 0 deletions

fpga/src/zybo-z7-20-ddr.svh
fpga/src/zybo-z7-20.svh 4 additions, 1 deletion

fpga/src/zybo-z7-20.svh
fpga/xilinx/xlnx_processing_system7/Makefile 2 additions, 0 deletions

fpga/xilinx/xlnx_processing_system7/Makefile
fpga/xilinx/xlnx_processing_system7/tcl/run.tcl 112 additions, 0 deletions

fpga/xilinx/xlnx_processing_system7/tcl/run.tcl

with 1130 additions and 88 deletions

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