update to implement cv32a6 on zybo z7-20 board

Makefile

fpga/Makefile

fpga/constraints/cva6_fpga.xdc

fpga/constraints/zybo_z7_20.xdc

fpga/openocd_diligent_hs2.cfg

fpga/scripts/program_cva6_fpga.tcl

fpga/scripts/run_cva6_fpga.tcl

fpga/src/ariane_peripherals_xilinx.sv

fpga/src/ariane_xilinx.sv

fpga/src/cva6_zybo_z7_20.sv

fpga/src/fan_ctrl.sv

fpga/src/genesysii.svh

fpga/src/kc705.svh

fpga/src/vc707.svh

fpga/src/vcu118.svh

fpga/src/zybo-z7-20.svh

fpga/xilinx/.gitignore

fpga/xilinx/ariane_xlnx_ip.yml

fpga/xilinx/common.mk

fpga/xilinx/xlnx_axi_clock_converter/Makefile