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MINOTAuR
MINOTAuR
Commits
79315884
Commit
79315884
authored
4 years ago
by
Alban Gruin
Browse files
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Plain Diff
scoreboard: scan the scoreboard for memory operations
Signed-off-by:
Alban Gruin
<
alban.gruin@irit.fr
>
parent
609df61a
Branches
Branches containing commit
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Changes
4
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4 changed files
src/ariane.sv
+9
-0
9 additions, 0 deletions
src/ariane.sv
src/issue_stage.sv
+4
-1
4 additions, 1 deletion
src/issue_stage.sv
src/scoreboard.sv
+30
-13
30 additions, 13 deletions
src/scoreboard.sv
src/verifier.sv
+3
-0
3 additions, 0 deletions
src/verifier.sv
with
46 additions
and
14 deletions
src/ariane.sv
+
9
−
0
View file @
79315884
...
@@ -94,6 +94,11 @@ module ariane import ariane_pkg::*; #(
...
@@ -94,6 +94,11 @@ module ariane import ariane_pkg::*; #(
// --------------
// --------------
logic
has_mem_access_id_verif
;
logic
has_mem_access_id_verif
;
// --------------
// ISSUE -> verifier
// --------------
logic
has_mem_access_is_verif
;
// --------------
// --------------
// ISSUE <-> EX
// ISSUE <-> EX
// --------------
// --------------
...
@@ -362,6 +367,7 @@ module ariane import ariane_pkg::*; #(
...
@@ -362,6 +367,7 @@ module ariane import ariane_pkg::*; #(
.
we_fpr_i
(
we_fpr_commit_id
),
.
we_fpr_i
(
we_fpr_commit_id
),
.
commit_instr_o
(
commit_instr_id_commit
),
.
commit_instr_o
(
commit_instr_id_commit
),
.
commit_ack_i
(
commit_ack
),
.
commit_ack_i
(
commit_ack
),
.
has_mem_access_o
(
has_mem_access_is_verif
),
.
*
.
*
);
);
...
@@ -635,6 +641,9 @@ module ariane import ariane_pkg::*; #(
...
@@ -635,6 +641,9 @@ module ariane import ariane_pkg::*; #(
// ID
// ID
.
id_has_mem_access_i
(
has_mem_access_id_verif
),
.
id_has_mem_access_i
(
has_mem_access_id_verif
),
// IS
.
is_has_mem_access_i
(
has_mem_access_is_verif
),
// CO
// CO
.
commit_instr_i
(
commit_instr_id_commit
),
.
commit_instr_i
(
commit_instr_id_commit
),
.
commit_ack_i
(
commit_ack
)
.
commit_ack_i
(
commit_ack
)
...
...
This diff is collapsed.
Click to expand it.
src/issue_stage.sv
+
4
−
1
View file @
79315884
...
@@ -70,7 +70,10 @@ module issue_stage import ariane_pkg::*; #(
...
@@ -70,7 +70,10 @@ module issue_stage import ariane_pkg::*; #(
input
logic
[
NR_COMMIT_PORTS
-
1
:
0
]
we_fpr_i
,
input
logic
[
NR_COMMIT_PORTS
-
1
:
0
]
we_fpr_i
,
output
scoreboard_entry_t
[
NR_COMMIT_PORTS
-
1
:
0
]
commit_instr_o
,
output
scoreboard_entry_t
[
NR_COMMIT_PORTS
-
1
:
0
]
commit_instr_o
,
input
logic
[
NR_COMMIT_PORTS
-
1
:
0
]
commit_ack_i
input
logic
[
NR_COMMIT_PORTS
-
1
:
0
]
commit_ack_i
,
// to verifier
output
has_mem_access_o
);
);
// ---------------------------------------------------
// ---------------------------------------------------
// Scoreboard (SB) <-> Issue and Read Operands (IRO)
// Scoreboard (SB) <-> Issue and Read Operands (IRO)
...
...
This diff is collapsed.
Click to expand it.
src/scoreboard.sv
+
30
−
13
View file @
79315884
...
@@ -60,7 +60,10 @@ module scoreboard #(
...
@@ -60,7 +60,10 @@ module scoreboard #(
input
logic
[
NR_WB_PORTS
-
1
:
0
][
ariane_pkg
::
TRANS_ID_BITS
-
1
:
0
]
trans_id_i
,
// transaction ID at which to write the result back
input
logic
[
NR_WB_PORTS
-
1
:
0
][
ariane_pkg
::
TRANS_ID_BITS
-
1
:
0
]
trans_id_i
,
// transaction ID at which to write the result back
input
logic
[
NR_WB_PORTS
-
1
:
0
][
riscv
::
XLEN
-
1
:
0
]
wbdata_i
,
// write data in
input
logic
[
NR_WB_PORTS
-
1
:
0
][
riscv
::
XLEN
-
1
:
0
]
wbdata_i
,
// write data in
input
ariane_pkg
::
exception_t
[
NR_WB_PORTS
-
1
:
0
]
ex_i
,
// exception from a functional unit (e.g.: ld/st exception)
input
ariane_pkg
::
exception_t
[
NR_WB_PORTS
-
1
:
0
]
ex_i
,
// exception from a functional unit (e.g.: ld/st exception)
input
logic
[
NR_WB_PORTS
-
1
:
0
]
wt_valid_i
// data in is valid
input
logic
[
NR_WB_PORTS
-
1
:
0
]
wt_valid_i
,
// data in is valid
// to verifier
output
logic
has_mem_access_o
);
);
localparam
int
unsigned
BITS_ENTRIES
=
$
clog2
(
NR_ENTRIES
);
localparam
int
unsigned
BITS_ENTRIES
=
$
clog2
(
NR_ENTRIES
);
...
@@ -77,6 +80,8 @@ module scoreboard #(
...
@@ -77,6 +80,8 @@ module scoreboard #(
logic
[
NR_COMMIT_PORTS
-
1
:
0
][
BITS_ENTRIES
-
1
:
0
]
commit_pointer_n
,
commit_pointer_q
;
logic
[
NR_COMMIT_PORTS
-
1
:
0
][
BITS_ENTRIES
-
1
:
0
]
commit_pointer_n
,
commit_pointer_q
;
logic
[$
clog2
(
NR_COMMIT_PORTS
)
:
0
]
num_commit
;
logic
[$
clog2
(
NR_COMMIT_PORTS
)
:
0
]
num_commit
;
logic
[
NR_ENTRIES
-
1
:
0
]
has_mem_access_n
,
has_mem_access_q
;
// the issue queue is full don't issue any new instructions
// the issue queue is full don't issue any new instructions
// works since aligned to power of 2
// works since aligned to power of 2
assign
issue_full
=
&
issue_cnt_q
;
assign
issue_full
=
&
issue_cnt_q
;
...
@@ -91,6 +96,9 @@ module scoreboard #(
...
@@ -91,6 +96,9 @@ module scoreboard #(
end
end
end
end
// check instructions in the scoreboard for memory operations
assign
has_mem_access_o
=
(
|
has_mem_access_q
);
// an instruction is ready for issue if we have place in the issue FIFO and it the decoder says it is valid
// an instruction is ready for issue if we have place in the issue FIFO and it the decoder says it is valid
always_comb
begin
always_comb
begin
issue_instr_o
=
decoded_instr_i
;
issue_instr_o
=
decoded_instr_i
;
...
@@ -106,8 +114,9 @@ module scoreboard #(
...
@@ -106,8 +114,9 @@ module scoreboard #(
// keep track of all issued instructions
// keep track of all issued instructions
always_comb
begin
:
issue_fifo
always_comb
begin
:
issue_fifo
// default assignment
// default assignment
mem_n
=
mem_q
;
mem_n
=
mem_q
;
issue_en
=
1'b0
;
issue_en
=
1'b0
;
has_mem_access_n
=
has_mem_access_q
;
// if we got a acknowledge from the issue stage, put this scoreboard entry in the queue
// if we got a acknowledge from the issue stage, put this scoreboard entry in the queue
if
(
decoded_instr_valid_i
&&
decoded_instr_ack_o
&&
!
flush_unissued_instr_i
)
begin
if
(
decoded_instr_valid_i
&&
decoded_instr_ack_o
&&
!
flush_unissued_instr_i
)
begin
...
@@ -118,6 +127,7 @@ module scoreboard #(
...
@@ -118,6 +127,7 @@ module scoreboard #(
ariane_pkg
::
is_rd_fpr
(
decoded_instr_i
.
op
),
// whether rd goes to the fpr
ariane_pkg
::
is_rd_fpr
(
decoded_instr_i
.
op
),
// whether rd goes to the fpr
decoded_instr_i
// decoded instruction record
decoded_instr_i
// decoded instruction record
}
;
}
;
has_mem_access_n
[
issue_pointer_q
]
=
decoded_instr_i
.
fu
inside
{
ariane_pkg
::
LOAD
,
ariane_pkg
::
STORE
}
;
end
end
// ------------
// ------------
...
@@ -146,6 +156,9 @@ module scoreboard #(
...
@@ -146,6 +156,9 @@ module scoreboard #(
// write the fflags back from the FPU (exception valid is never set), leave tval intact
// write the fflags back from the FPU (exception valid is never set), leave tval intact
else
if
(
mem_q
[
trans_id_i
[
i
]].
sbe
.
fu
inside
{
ariane_pkg
::
FPU
,
ariane_pkg
::
FPU_VEC
}
)
else
if
(
mem_q
[
trans_id_i
[
i
]].
sbe
.
fu
inside
{
ariane_pkg
::
FPU
,
ariane_pkg
::
FPU_VEC
}
)
mem_n
[
trans_id_i
[
i
]].
sbe
.
ex
.
cause
=
ex_i
[
i
].
cause
;
mem_n
[
trans_id_i
[
i
]].
sbe
.
ex
.
cause
=
ex_i
[
i
].
cause
;
if
(
mem_n
[
trans_id_i
[
i
]].
sbe
.
fu
!=
ariane_pkg
::
STORE
)
has_mem_access_n
[
trans_id_i
[
i
]]
=
1'b0
;
end
end
end
end
...
@@ -156,8 +169,9 @@ module scoreboard #(
...
@@ -156,8 +169,9 @@ module scoreboard #(
for
(
logic
[
BITS_ENTRIES
-
1
:
0
]
i
=
0
;
i
<
NR_COMMIT_PORTS
;
i
++
)
begin
for
(
logic
[
BITS_ENTRIES
-
1
:
0
]
i
=
0
;
i
<
NR_COMMIT_PORTS
;
i
++
)
begin
if
(
commit_ack_i
[
i
])
begin
if
(
commit_ack_i
[
i
])
begin
// this instruction is no longer in issue e.g.: it is considered finished
// this instruction is no longer in issue e.g.: it is considered finished
mem_n
[
commit_pointer_q
[
i
]].
issued
=
1'b0
;
mem_n
[
commit_pointer_q
[
i
]].
issued
=
1'b0
;
mem_n
[
commit_pointer_q
[
i
]].
sbe
.
valid
=
1'b0
;
mem_n
[
commit_pointer_q
[
i
]].
sbe
.
valid
=
1'b0
;
has_mem_access_n
[
commit_pointer_q
[
i
]]
=
1'b0
;
end
end
end
end
...
@@ -170,6 +184,7 @@ module scoreboard #(
...
@@ -170,6 +184,7 @@ module scoreboard #(
mem_n
[
i
].
issued
=
1'b0
;
mem_n
[
i
].
issued
=
1'b0
;
mem_n
[
i
].
sbe
.
valid
=
1'b0
;
mem_n
[
i
].
sbe
.
valid
=
1'b0
;
mem_n
[
i
].
sbe
.
ex
.
valid
=
1'b0
;
mem_n
[
i
].
sbe
.
ex
.
valid
=
1'b0
;
has_mem_access_n
[
i
]
=
1'b0
;
end
end
end
end
end
end
...
@@ -353,15 +368,17 @@ module scoreboard #(
...
@@ -353,15 +368,17 @@ module scoreboard #(
// sequential process
// sequential process
always_ff
@
(
posedge
clk_i
or
negedge
rst_ni
)
begin
:
regs
always_ff
@
(
posedge
clk_i
or
negedge
rst_ni
)
begin
:
regs
if
(
!
rst_ni
)
begin
if
(
!
rst_ni
)
begin
mem_q
<=
'
{
default
:
0
}
;
mem_q
<=
'
{
default
:
0
}
;
issue_cnt_q
<=
'0
;
issue_cnt_q
<=
'0
;
commit_pointer_q
<=
'0
;
commit_pointer_q
<=
'0
;
issue_pointer_q
<=
'0
;
issue_pointer_q
<=
'0
;
has_mem_access_q
<=
'0
;
end
else
begin
end
else
begin
issue_cnt_q
<=
issue_cnt_n
;
issue_cnt_q
<=
issue_cnt_n
;
issue_pointer_q
<=
issue_pointer_n
;
issue_pointer_q
<=
issue_pointer_n
;
mem_q
<=
mem_n
;
mem_q
<=
mem_n
;
commit_pointer_q
<=
commit_pointer_n
;
commit_pointer_q
<=
commit_pointer_n
;
has_mem_access_q
<=
has_mem_access_n
;
end
end
end
end
...
...
This diff is collapsed.
Click to expand it.
src/verifier.sv
+
3
−
0
View file @
79315884
...
@@ -12,6 +12,9 @@ module verifier #(
...
@@ -12,6 +12,9 @@ module verifier #(
// ID
// ID
input
logic
id_has_mem_access_i
,
input
logic
id_has_mem_access_i
,
// IS
input
logic
is_has_mem_access_i
,
// CO
// CO
input
ariane_pkg
::
scoreboard_entry_t
[
NR_COMMIT_PORTS
-
1
:
0
]
commit_instr_i
,
input
ariane_pkg
::
scoreboard_entry_t
[
NR_COMMIT_PORTS
-
1
:
0
]
commit_instr_i
,
input
logic
[
NR_COMMIT_PORTS
-
1
:
0
]
commit_ack_i
input
logic
[
NR_COMMIT_PORTS
-
1
:
0
]
commit_ack_i
...
...
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