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MINOTAuR
printemps
Commits
3663eebd
Unverified
Commit
3663eebd
authored
4 years ago
by
Ruige Lee
Committed by
GitHub
4 years ago
Browse files
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Plain Diff
cva6: Fix signals on the FPGA model (#513)
Signed-off-by:
Ruige Lee
<
295054118@qq.com
>
parent
60945b2e
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Changes
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2 changed files
fpga/src/ariane_peripherals_xilinx.sv
+2
-3
2 additions, 3 deletions
fpga/src/ariane_peripherals_xilinx.sv
fpga/src/ariane_xilinx.sv
+1
-1
1 addition, 1 deletion
fpga/src/ariane_xilinx.sv
with
3 additions
and
4 deletions
fpga/src/ariane_peripherals_xilinx.sv
+
2
−
3
View file @
3663eebd
...
@@ -605,7 +605,6 @@ module ariane_peripherals #(
...
@@ -605,7 +605,6 @@ module ariane_peripherals #(
logic
s_axi_gpio_awready
;
logic
s_axi_gpio_awready
;
logic
[
31
:
0
]
s_axi_gpio_wdata
;
logic
[
31
:
0
]
s_axi_gpio_wdata
;
logic
[
3
:
0
]
s_axi_gpio_wstrb
;
logic
[
3
:
0
]
s_axi_gpio_wstrb
;
logic
s_axi_gpio_wlast
;
logic
s_axi_gpio_wvalid
;
logic
s_axi_gpio_wvalid
;
logic
s_axi_gpio_wready
;
logic
s_axi_gpio_wready
;
logic
[
1
:
0
]
s_axi_gpio_bresp
;
logic
[
1
:
0
]
s_axi_gpio_bresp
;
...
@@ -681,7 +680,7 @@ module ariane_peripherals #(
...
@@ -681,7 +680,7 @@ module ariane_peripherals #(
.
m_axi_awready
(
s_axi_gpio_awready
),
.
m_axi_awready
(
s_axi_gpio_awready
),
.
m_axi_wdata
(
s_axi_gpio_wdata
),
.
m_axi_wdata
(
s_axi_gpio_wdata
),
.
m_axi_wstrb
(
s_axi_gpio_wstrb
),
.
m_axi_wstrb
(
s_axi_gpio_wstrb
),
.
m_axi_wlast
(
s_axi_gpio_wlast
),
.
m_axi_wlast
(
),
.
m_axi_wvalid
(
s_axi_gpio_wvalid
),
.
m_axi_wvalid
(
s_axi_gpio_wvalid
),
.
m_axi_wready
(
s_axi_gpio_wready
),
.
m_axi_wready
(
s_axi_gpio_wready
),
.
m_axi_bresp
(
s_axi_gpio_bresp
),
.
m_axi_bresp
(
s_axi_gpio_bresp
),
...
@@ -732,7 +731,7 @@ module ariane_peripherals #(
...
@@ -732,7 +731,7 @@ module ariane_peripherals #(
);
);
assign
s_axi_gpio_rlast
=
1'b1
;
assign
s_axi_gpio_rlast
=
1'b1
;
assign
s_axi_gpio_wlast
=
1'b1
;
end
end
// 6. Timer
// 6. Timer
...
...
This diff is collapsed.
Click to expand it.
fpga/src/ariane_xilinx.sv
+
1
−
1
View file @
3663eebd
...
@@ -180,7 +180,7 @@ logic test_en;
...
@@ -180,7 +180,7 @@ logic test_en;
logic
ndmreset
;
logic
ndmreset
;
logic
ndmreset_n
;
logic
ndmreset_n
;
logic
debug_req_irq
;
logic
debug_req_irq
;
logic
time_irq
;
logic
time
r
_irq
;
logic
ipi
;
logic
ipi
;
logic
clk
;
logic
clk
;
...
...
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