Skip to content
Snippets Groups Projects
Commit c09d96f8 authored by Jonathan's avatar Jonathan
Browse files

Materials for sstic 2022

parent 5d48f373
No related branches found
No related tags found
No related merge requests found
Showing
with 8183 additions and 0 deletions
Makefile 0 → 100644
OCD = ../openocd_zynq.tcl
#===============================================================================
all: openocd
openocd: ${OCD} hw/design_0_wrapper.bit exec_from_bram.gdb
make -C sw
make -C sw/sw_att/
# TO BE RUN IN AN OTHER TERMINAL:
# gdb-multiarch -ex "set architecture armv7" -ex "target extended-remote localhost:3333" --command="gdbinit.gdb"
#
/usr/bin/openocd -f $<
qemu: exec_from_bram.gdb
make -C sw
# TO BE RUN IN AN OTHER TERMINAL:
# gdb-multiarch -ex "target remote localhost:1234" --command="$^"
#
qemu-system-arm -machine xilinx-zynq-a9 -cpu cortex-a9 -m 1132M -nographic \
-serial null -serial mon:stdio -gdb tcp::1234
sdcard: sdcard/boot.bif sw/fsbl/main.elf sw/app/main.elf hw/design_0_wrapper.bit
make -C sw
make -C sdcard
# copy file sdcard/boot.bin on the SD card and boot the Zybo ; connect to the
# board with:
# pyserial-miniterm /dev/ttyUSB1 115200
hw/design_0_wrapper.bit:
make -C hw
#===============================================================================
clean:
make -C sw clean
make -C hw clean
make -C sdcard clean
make -C sw/sw_att/ clean
make -C hw/logic_analyzer/decode clean
README 0 → 100644
Here we run some attacks to try to reproduce the same traces in the logic
analyser as an execution of the code in the BRAM.
To run the attacks from gdb, run the following commands (with openOCD running):
$ gdb-multiarch -ex "set architecture armv7" -ex "target extended-remote localhost:3333" --command=exec_from_bram.gdb
$ gdb-multiarch -ex "set architecture armv7" -ex "target extended-remote localhost:3333" --command=attack_0.gdb
[...]
To observe the traces in the logic analyser, run the following commands (there
is no need to run the attacks first as we saved the data from the logic
analyser):
$ make -C ./hw/logic_analyzer/decode clean
$ make -C ./hw/logic_analyzer/decode
In the attacks, we read in the BRAM to have the same traces as a fetch.
Also, we add indirect branches and re-configure CoreSight and the MMU to try to
have the same "trace_data" in the TPIU.
When we run the attacks from gdb, we use openOCD.
0)
The first step is to proceed to a fetch and execution of the code in the BRAM to
save the signals for a future comparison. It is recommended to hard-reset the
board between each try so that we get a determistic behaviour for CoreSight.
1)
In the first attack, we show that we must use 9 registers to read 8 times 32
bits from the BRAM. Otherwise, this does not reproduces the same signals.
2)
In the second attack, we show that, if we "add r10, pc, #16" and "mov pc, r10"
after each read in the BRAM, this introduces a delay between the reads. Hence a
mismatch with an execution of the code in the BRAM.
3)
In the third attack, we show that, if we prepare several registers with the
destination addresses first, then only "mov pc, [rx]" after each read in the
BRAM, we obtain the same traces for a read access as a fetch (there is a limit
since the number of registers is fixed by the architecture).
We have a mismatch on the "trace_data" in the TPIU. This is because we do not
have the same destination addresses and, if we configure the MMU to ouput the
same addresses, we will have a match.
4)
In the fourth attack, we reconfigure the MMU and we re-run the the code in the
BRAM with the same destination addresses as the third attack.
Once again, it is recommended to hard-reset the board between each try so that
we get a determistic behaviour for CoreSight.
Note: the third attack might need to be run several times to match the signals
from a fetch. But eventually, we have a match: this means that the hardware
monitor can be tricked.
The solution is to have enough indirect branches in the code in the BRAM so that
an attacker runs out of registers to prepare the attack.
ARM v7 microprocessors have thirteen general-purpose 32-bit registers, R0 to
R12; plus three 32-bit registers with special uses, SP, LR, and PC. (see ARM v7
architecture reference manual)
The attacker cannot use PC as a register for the attack, but (s)he can use SP
and LR. So, 15 registers are available.
The attacker must use 9 registers to read in the BRAM and simulate a fetch.
Then, the attacker can only prepare 6 indirect branches before running the
attack.
So, to defend ourselves, we must have a code that contains at least 7 packs of 8
words of code, each with an indirect branch.
This forces the attacker to re-create the desination address after the 6th read
and introduces a delay just like in the first attack.
#
# Copyright (C) 2021 Jonathan Certes
#
# This program is free software: you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation, either version 3 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along with
# this program. If not, see <http://www.gnu.org/licenses/>.
#
set pagination off
set architecture armv7
monitor reset halt
monitor pld load 0 ./hw/design_0_wrapper.bit
monitor gdb_sync
# now controlling gdb:
file sw/fsbl/main.elf
load sw/fsbl/main.elf
break _boot
jump _boot
#layout regs
# add a breakpoint in each entry of the exception vectors table:
break *0x00
break *0x04
break *0x08
break *0x0c
break *0x10
break *0x14
break *0x18
break *0x1c
# run until we reach Loop (ps7_init terminated properly) or FsblHookFallback (an
# error occurred, case of qemu since all devices cannot be initialized):
break Loop
break FsblHookFallback
continue
continue
# load the application:
file sw/app/main.elf
load sw/app/main.elf
break _start
jump _start
break main
continue
# try to load the code into the BRAM (only works if write-enable button is
# pressed on the board):
monitor load_image sw/sw_att/code.text 0x40000000
# call the attack 0:
break __breakpoint_select
continue
set theSelect = 1
break __my_breakpoint
continue
# reading the network analyser traces:
set logging off
set logging overwrite on
set logging redirect on
set logging file ./hw/logic_analyzer/decode/data_attack_1.gdb
set logging on
x /1024wx 0x42000000
set logging off
quit
#
# Copyright (C) 2021 Jonathan Certes
#
# This program is free software: you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation, either version 3 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along with
# this program. If not, see <http://www.gnu.org/licenses/>.
#
set pagination off
set architecture armv7
monitor reset halt
monitor pld load 0 ./hw/design_0_wrapper.bit
monitor gdb_sync
# now controlling gdb:
file sw/fsbl/main.elf
load sw/fsbl/main.elf
break _boot
jump _boot
#layout regs
# add a breakpoint in each entry of the exception vectors table:
break *0x00
break *0x04
break *0x08
break *0x0c
break *0x10
break *0x14
break *0x18
break *0x1c
# run until we reach Loop (ps7_init terminated properly) or FsblHookFallback (an
# error occurred, case of qemu since all devices cannot be initialized):
break Loop
break FsblHookFallback
continue
continue
# load the application:
file sw/app/main.elf
load sw/app/main.elf
break _start
jump _start
break main
continue
# try to load the code into the BRAM (only works if write-enable button is
# pressed on the board):
monitor load_image sw/sw_att/code.text 0x40000000
# call the attack 1:
break __breakpoint_select
continue
set theSelect = 2
break __my_breakpoint
continue
# reading the network analyser traces:
set logging off
set logging overwrite on
set logging redirect on
set logging file ./hw/logic_analyzer/decode/data_attack_2.gdb
set logging on
x /1024wx 0x42000000
set logging off
quit
#
# Copyright (C) 2021 Jonathan Certes
#
# This program is free software: you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation, either version 3 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along with
# this program. If not, see <http://www.gnu.org/licenses/>.
#
set pagination off
set architecture armv7
monitor reset halt
monitor pld load 0 ./hw/design_0_wrapper.bit
monitor gdb_sync
# now controlling gdb:
file sw/fsbl/main.elf
load sw/fsbl/main.elf
break _boot
jump _boot
#layout regs
# add a breakpoint in each entry of the exception vectors table:
break *0x00
break *0x04
break *0x08
break *0x0c
break *0x10
break *0x14
break *0x18
break *0x1c
# run until we reach Loop (ps7_init terminated properly) or FsblHookFallback (an
# error occurred, case of qemu since all devices cannot be initialized):
break Loop
break FsblHookFallback
continue
continue
# load the application:
file sw/app/main.elf
load sw/app/main.elf
break _start
jump _start
break main
continue
# try to load the code into the BRAM (only works if write-enable button is
# pressed on the board):
monitor load_image sw/sw_att/code.text 0x40000000
# call the attack 1:
break __breakpoint_select
continue
set theSelect = 3
break __my_breakpoint
continue
# reading the network analyser traces:
set logging off
set logging overwrite on
set logging redirect on
set logging file ./hw/logic_analyzer/decode/data_attack_3.gdb
set logging on
x /1024wx 0x42000000
set logging off
quit
#
# Copyright (C) 2021 Jonathan Certes
#
# This program is free software: you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation, either version 3 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along with
# this program. If not, see <http://www.gnu.org/licenses/>.
#
set pagination off
set architecture armv7
monitor reset halt
monitor pld load 0 ./hw/design_0_wrapper.bit
monitor gdb_sync
# now controlling gdb:
file sw/fsbl/main.elf
load sw/fsbl/main.elf
break _boot
jump _boot
#layout regs
# add a breakpoint in each entry of the exception vectors table:
break *0x00
break *0x04
break *0x08
break *0x0c
break *0x10
break *0x14
break *0x18
break *0x1c
# run until we reach Loop (ps7_init terminated properly) or FsblHookFallback (an
# error occurred, case of qemu since all devices cannot be initialized):
break Loop
break FsblHookFallback
continue
continue
# load the application:
file sw/app/main.elf
load sw/app/main.elf
break _start
jump _start
break main
continue
# try to load the code into the BRAM (only works if write-enable button is
# pressed on the board):
monitor load_image sw/sw_att/code.text 0x40000000
# call the attack 1:
break __breakpoint_select
continue
set theSelect = 4
break __my_breakpoint
continue
# reading the network analyser traces:
set logging off
set logging overwrite on
set logging redirect on
set logging file ./hw/logic_analyzer/decode/data_attack_4.gdb
set logging on
x /1024wx 0x42000000
set logging off
quit
#
# Copyright (C) 2021 Jonathan Certes
#
# This program is free software: you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation, either version 3 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along with
# this program. If not, see <http://www.gnu.org/licenses/>.
#
set pagination off
set architecture armv7
monitor reset halt
monitor pld load 0 ./hw/design_0_wrapper.bit
monitor gdb_sync
# now controlling gdb:
file sw/fsbl/main.elf
load sw/fsbl/main.elf
break _boot
jump _boot
#layout regs
# add a breakpoint in each entry of the exception vectors table:
break *0x00
break *0x04
break *0x08
break *0x0c
break *0x10
break *0x14
break *0x18
break *0x1c
# run until we reach Loop (ps7_init terminated properly) or FsblHookFallback (an
# error occurred, case of qemu since all devices cannot be initialized):
break Loop
break FsblHookFallback
continue
continue
# load the application:
file sw/app/main.elf
load sw/app/main.elf
break _start
jump _start
break main
continue
# try to load the code into the BRAM (only works if write-enable button is
# pressed on the board):
monitor load_image sw/sw_att/code.text 0x40000000
# call the software from the BRAM:
break __breakpoint_select
continue
set theSelect = 0
break __my_breakpoint
continue
# reading the network analyser traces:
set logging off
set logging overwrite on
set logging redirect on
set logging file ./hw/logic_analyzer/decode/data_fetch.gdb
set logging on
x /1024wx 0x42000000
set logging off
quit
HDL = sw_att.v \
\
coresight2pl/async_decompress.v \
coresight2pl/packets_decoder_core.v \
coresight2pl/packets_decoder.v \
coresight2pl/packets_decompresser.v \
coresight2pl/overall_pft_trace_decompress.v \
coresight2pl/coresight2pl.v \
\
logic_analyzer/logic_analyzer.v \
logic_analyzer/parallel2bram.v
SCHEM = schematic.tcl
TOP = design_0_wrapper
# cora Z7007S:
FPGA = xc7z007sclg400-1
BOARD = digilentinc.com:cora-z7-07s:part0:1.0
XDC = constraints_coraz7.xdc
#===============================================================================
all : ${TOP}.bit ps7_init.h ps7_init.c
${TOP}.bit ps7_init.h ps7_init.c : ${HDL} ${SCHEM} ${XDC}
../../vivadoMakefile.tcl \
--hdl ${HDL} --schem ${SCHEM} \
--fpga ${FPGA} --board ${BOARD} --constr ${XDC} --top ${TOP}
# find ps7_init files:
test -e ps7_init.c || ln -s "$$(find . -name ps7_init.c)"
test -e ps7_init.h || ln -s "$$(find . -name ps7_init.h)"
clean :
$(RM) -r ./vivado.workspace/ ./NA/
$(RM) vivado_*.backup.log vivado.log vivado_*.backup.jou vivado.jou
$(RM) ${TOP}.bit ps7_init.h ps7_init.c
## This file is a general .xdc for the Cora Z7-07S Rev. B
## To use it in a project:
## - uncomment the lines corresponding to used pins
## - rename the used ports (in each line, after get_ports) according to the top level signal names in the project
## PL System Clock
set_property -dict { PACKAGE_PIN H16 IOSTANDARD LVCMOS33 } [get_ports { clk }]; #IO_L13P_T2_MRCC_35 Sch=sysclk
create_clock -add -name sys_clk_pin -period 10.00 [get_ports { clk }]; # 100MHz
## RGB LEDs
#set_property -dict { PACKAGE_PIN L15 IOSTANDARD LVCMOS33 } [get_ports { led0_b }]; #IO_L22N_T3_AD7N_35 Sch=led0_b
set_property -dict { PACKAGE_PIN G17 IOSTANDARD LVCMOS33 } [get_ports { led_0 }]; #IO_L16P_T2_35 Sch=led0_g
#set_property -dict { PACKAGE_PIN N15 IOSTANDARD LVCMOS33 } [get_ports { led0_r }]; #IO_L21P_T3_DQS_AD14P_35 Sch=led0_r
#set_property -dict { PACKAGE_PIN G14 IOSTANDARD LVCMOS33 } [get_ports { led1_b }]; #IO_0_35 Sch=led1_b
#set_property -dict { PACKAGE_PIN L14 IOSTANDARD LVCMOS33 } [get_ports { led_1 }]; #IO_L22P_T3_AD7P_35 Sch=led1_g
#set_property -dict { PACKAGE_PIN M15 IOSTANDARD LVCMOS33 } [get_ports { led1_r }]; #IO_L23N_T3_35 Sch=led1_r
## Buttons
set_property -dict { PACKAGE_PIN D20 IOSTANDARD LVCMOS33 } [get_ports { btn_0 }]; #IO_L4N_T0_35 Sch=btn[0]
#set_property -dict { PACKAGE_PIN D19 IOSTANDARD LVCMOS33 } [get_ports { btn_1 }]; #IO_L4P_T0_35 Sch=btn[1]
## Pmod Header JA
#set_property -dict { PACKAGE_PIN Y18 IOSTANDARD LVCMOS33 } [get_ports { ja[0] }]; #IO_L17P_T2_34 Sch=ja_p[1]
#set_property -dict { PACKAGE_PIN Y19 IOSTANDARD LVCMOS33 } [get_ports { ja[1] }]; #IO_L17N_T2_34 Sch=ja_n[1]
#set_property -dict { PACKAGE_PIN Y16 IOSTANDARD LVCMOS33 } [get_ports { ja[2] }]; #IO_L7P_T1_34 Sch=ja_p[2]
#set_property -dict { PACKAGE_PIN Y17 IOSTANDARD LVCMOS33 } [get_ports { ja[3] }]; #IO_L7N_T1_34 Sch=ja_n[2]
#set_property -dict { PACKAGE_PIN U18 IOSTANDARD LVCMOS33 } [get_ports { ja[4] }]; #IO_L12P_T1_MRCC_34 Sch=ja_p[3]
#set_property -dict { PACKAGE_PIN U19 IOSTANDARD LVCMOS33 } [get_ports { ja[5] }]; #IO_L12N_T1_MRCC_34 Sch=ja_n[3]
#set_property -dict { PACKAGE_PIN W18 IOSTANDARD LVCMOS33 } [get_ports { ja[6] }]; #IO_L22P_T3_34 Sch=ja_p[4]
#set_property -dict { PACKAGE_PIN W19 IOSTANDARD LVCMOS33 } [get_ports { ja[7] }]; #IO_L22N_T3_34 Sch=ja_n[4]
## Pmod Header JB
#set_property -dict { PACKAGE_PIN W14 IOSTANDARD LVCMOS33 } [get_ports { jb[0] }]; #IO_L8P_T1_34 Sch=jb_p[1]
#set_property -dict { PACKAGE_PIN Y14 IOSTANDARD LVCMOS33 } [get_ports { jb[1] }]; #IO_L8N_T1_34 Sch=jb_n[1]
#set_property -dict { PACKAGE_PIN T11 IOSTANDARD LVCMOS33 } [get_ports { jb[2] }]; #IO_L1P_T0_34 Sch=jb_p[2]
#set_property -dict { PACKAGE_PIN T10 IOSTANDARD LVCMOS33 } [get_ports { jb[3] }]; #IO_L1N_T0_34 Sch=jb_n[2]
#set_property -dict { PACKAGE_PIN V16 IOSTANDARD LVCMOS33 } [get_ports { jb[4] }]; #IO_L18P_T2_34 Sch=jb_p[3]
#set_property -dict { PACKAGE_PIN W16 IOSTANDARD LVCMOS33 } [get_ports { jb[5] }]; #IO_L18N_T2_34 Sch=jb_n[3]
#set_property -dict { PACKAGE_PIN V12 IOSTANDARD LVCMOS33 } [get_ports { jb[6] }]; #IO_L4P_T0_34 Sch=jb_p[4]
#set_property -dict { PACKAGE_PIN W13 IOSTANDARD LVCMOS33 } [get_ports { jb[7] }]; #IO_L4N_T0_34 Sch=jb_n[4]
## Crypto SDA
#set_property -dict { PACKAGE_PIN J15 IOSTANDARD LVCMOS33 } [get_ports { crypto_sda }];
## Dedicated Analog Inputs
#set_property -dict { PACKAGE_PIN K9 IOSTANDARD LVCMOS33 } [get_ports { v_p }]; #VP_0 Sch=xadc_v_p
#set_property -dict { PACKAGE_PIN L10 IOSTANDARD LVCMOS33 } [get_ports { v_n }]; #VN_0 Sch=xadc_v_n
## ChipKit Outer Analog Header - as Single-Ended Analog Inputs
## NOTE: These ports can be used as single-ended analog inputs with voltages from 0-3.3V (ChipKit analog pins A0-A5) or as digital I/O.
## WARNING: Do not use both sets of constraints at the same time!
#set_property -dict { PACKAGE_PIN E17 IOSTANDARD LVCMOS33 } [get_ports { vaux1_p }]; #IO_L3P_T0_DQS_AD1P_35 Sch=ck_an_p[0]
#set_property -dict { PACKAGE_PIN D18 IOSTANDARD LVCMOS33 } [get_ports { vaux1_n }]; #IO_L3N_T0_DQS_AD1N_35 Sch=ck_an_n[0]
#set_property -dict { PACKAGE_PIN E18 IOSTANDARD LVCMOS33 } [get_ports { vaux9_p }]; #IO_L5P_T0_AD9P_35 Sch=ck_an_p[1]
#set_property -dict { PACKAGE_PIN E19 IOSTANDARD LVCMOS33 } [get_ports { vaux9_n }]; #IO_L5N_T0_AD9N_35 Sch=ck_an_n[1]
#set_property -dict { PACKAGE_PIN K14 IOSTANDARD LVCMOS33 } [get_ports { vaux6_p }]; #IO_L20P_T3_AD6P_35 Sch=ck_an_p[2]
#set_property -dict { PACKAGE_PIN J14 IOSTANDARD LVCMOS33 } [get_ports { vaux6_n }]; #IO_L20N_T3_AD6N_35 Sch=ck_an_n[2]
#set_property -dict { PACKAGE_PIN K16 IOSTANDARD LVCMOS33 } [get_ports { vaux15_p }]; #IO_L24P_T3_AD15P_35 Sch=ck_an_p[3]
#set_property -dict { PACKAGE_PIN J16 IOSTANDARD LVCMOS33 } [get_ports { vaux15_n }]; #IO_L24N_T3_AD15N_35 Sch=ck_an_n[3]
#set_property -dict { PACKAGE_PIN J20 IOSTANDARD LVCMOS33 } [get_ports { vaux5_p }]; #IO_L17P_T2_AD5P_35 Sch=ck_an_p[4]
#set_property -dict { PACKAGE_PIN H20 IOSTANDARD LVCMOS33 } [get_ports { vaux5_n }]; #IO_L17N_T2_AD5N_35 Sch=ck_an_n[4]
#set_property -dict { PACKAGE_PIN G19 IOSTANDARD LVCMOS33 } [get_ports { vaux13_p }]; #IO_L18P_T2_AD13P_35 Sch=ck_an_p[5]
#set_property -dict { PACKAGE_PIN G20 IOSTANDARD LVCMOS33 } [get_ports { vaux13_n }]; #IO_L18N_T2_AD13N_35 Sch=ck_an_n[5]
## ChipKit Outer Analog Header - as Digital I/O
## NOTE: The following constraints should be used when using these ports as digital I/O.
#set_property -dict { PACKAGE_PIN F17 IOSTANDARD LVCMOS33 } [get_ports { ck_a0 }]; #IO_L6N_T0_VREF_35 Sch=ck_a[0]
#set_property -dict { PACKAGE_PIN J19 IOSTANDARD LVCMOS33 } [get_ports { ck_a1 }]; #IO_L10N_T1_AD11N_35 Sch=ck_a[1]
#set_property -dict { PACKAGE_PIN K17 IOSTANDARD LVCMOS33 } [get_ports { ck_a2 }]; #IO_L12P_T1_MRCC_35 Sch=ck_a[2]
#set_property -dict { PACKAGE_PIN L16 IOSTANDARD LVCMOS33 } [get_ports { ck_a3 }]; #IO_L11P_T1_SRCC_35 Sch=ck_a[3]
#set_property -dict { PACKAGE_PIN N16 IOSTANDARD LVCMOS33 } [get_ports { ck_a4 }]; #IO_L21N_T3_DQS_AD14N_35 Sch=ck_a[4]
#set_property -dict { PACKAGE_PIN P14 IOSTANDARD LVCMOS33 } [get_ports { ck_a5 }]; #IO_L6P_T0_34 Sch=ck_a[5]
## ChipKit Inner Analog Header - as Differential Analog Inputs
## NOTE: These ports can be used as differential analog inputs with voltages from 0-1.0V (ChipKit analog pins A6-A11) or as digital I/O.
## WARNING: Do not use both sets of constraints at the same time!
#set_property -dict { PACKAGE_PIN C20 IOSTANDARD LVCMOS33 } [get_ports { vaux0_p }]; #IO_L1P_T0_AD0P_35 Sch=ad_p[0]
#set_property -dict { PACKAGE_PIN B20 IOSTANDARD LVCMOS33 } [get_ports { vaux0_n }]; #IO_L1N_T0_AD0N_35 Sch=ad_n[0]
#set_property -dict { PACKAGE_PIN F19 IOSTANDARD LVCMOS33 } [get_ports { vaux12_p }]; #IO_L15P_T2_DQS_AD12P_35 Sch=ad_p[12]
#set_property -dict { PACKAGE_PIN F20 IOSTANDARD LVCMOS33 } [get_ports { vaux12_n }]; #IO_L15N_T2_DQS_AD12N_35 Sch=ad_n[12]
#set_property -dict { PACKAGE_PIN B19 IOSTANDARD LVCMOS33 } [get_ports { vaux8_p }]; #IO_L2P_T0_AD8P_35 Sch=ad_p[8]
#set_property -dict { PACKAGE_PIN A20 IOSTANDARD LVCMOS33 } [get_ports { vaux8_n }]; #IO_L2N_T0_AD8N_35 Sch=ad_n[8]
## ChipKit Inner Analog Header - as Digital I/O
## NOTE: The following constraints should be used when using the inner analog header ports as digital I/O.
#set_property -dict { PACKAGE_PIN C20 IOSTANDARD LVCMOS33 } [get_ports { ck_a6 }]; #IO_L1P_T0_AD0P_35 Sch=ad_p[0]
#set_property -dict { PACKAGE_PIN B20 IOSTANDARD LVCMOS33 } [get_ports { ck_a7 }]; #IO_L1N_T0_AD0N_35 Sch=ad_n[0]
#set_property -dict { PACKAGE_PIN F19 IOSTANDARD LVCMOS33 } [get_ports { ck_a8 }]; #IO_L15P_T2_DQS_AD12P_35 Sch=ad_p[12]
#set_property -dict { PACKAGE_PIN F20 IOSTANDARD LVCMOS33 } [get_ports { ck_a9 }]; #IO_L15N_T2_DQS_AD12N_35 Sch=ad_n[12]
#set_property -dict { PACKAGE_PIN B19 IOSTANDARD LVCMOS33 } [get_ports { ck_a10 }]; #IO_L2P_T0_AD8P_35 Sch=ad_p[8]
#set_property -dict { PACKAGE_PIN A20 IOSTANDARD LVCMOS33 } [get_ports { ck_a11 }]; #IO_L2N_T0_AD8N_35 Sch=ad_n[8]
## ChipKit Outer Digital Header
#set_property -dict { PACKAGE_PIN U14 IOSTANDARD LVCMOS33 } [get_ports { ck_io0 }]; #IO_L11P_T1_SRCC_34 Sch=ck_io[0]
#set_property -dict { PACKAGE_PIN V13 IOSTANDARD LVCMOS33 } [get_ports { ck_io1 }]; #IO_L3N_T0_DQS_34 Sch=ck_io[1]
#set_property -dict { PACKAGE_PIN T14 IOSTANDARD LVCMOS33 } [get_ports { ck_io2 }]; #IO_L5P_T0_34 Sch=ck_io[2]
#set_property -dict { PACKAGE_PIN T15 IOSTANDARD LVCMOS33 } [get_ports { ck_io3 }]; #IO_L5N_T0_34 Sch=ck_io[3]
#set_property -dict { PACKAGE_PIN V17 IOSTANDARD LVCMOS33 } [get_ports { ck_io4 }]; #IO_L21P_T3_DQS_34 Sch=ck_io[4]
#set_property -dict { PACKAGE_PIN V18 IOSTANDARD LVCMOS33 } [get_ports { ck_io5 }]; #IO_L21N_T3_DQS_34 Sch=ck_io[5]
#set_property -dict { PACKAGE_PIN R17 IOSTANDARD LVCMOS33 } [get_ports { ck_io6 }]; #IO_L19N_T3_VREF_34 Sch=ck_io[6]
#set_property -dict { PACKAGE_PIN R14 IOSTANDARD LVCMOS33 } [get_ports { ck_io7 }]; #IO_L6N_T0_VREF_34 Sch=ck_io[7]
#set_property -dict { PACKAGE_PIN N18 IOSTANDARD LVCMOS33 } [get_ports { ck_io8 }]; #IO_L13P_T2_MRCC_34 Sch=ck_io[8]
#set_property -dict { PACKAGE_PIN M18 IOSTANDARD LVCMOS33 } [get_ports { ck_io9 }]; #IO_L8N_T1_AD10N_35 Sch=ck_io[9]
#set_property -dict { PACKAGE_PIN U15 IOSTANDARD LVCMOS33 } [get_ports { ck_io10 }]; #IO_L11N_T1_SRCC_34 Sch=ck_io[10]
#set_property -dict { PACKAGE_PIN K18 IOSTANDARD LVCMOS33 } [get_ports { ck_io11 }]; #IO_L12N_T1_MRCC_35 Sch=ck_io[11]
#set_property -dict { PACKAGE_PIN J18 IOSTANDARD LVCMOS33 } [get_ports { ck_io12 }]; #IO_L14P_T2_AD4P_SRCC_35 Sch=ck_io[12]
#set_property -dict { PACKAGE_PIN G15 IOSTANDARD LVCMOS33 } [get_ports { ck_io13 }]; #IO_L19N_T3_VREF_35 Sch=ck_io[13]
## ChipKit Inner Digital Header
#set_property -dict { PACKAGE_PIN R16 IOSTANDARD LVCMOS33 } [get_ports { ck_io26 }]; #IO_L19P_T3_34 Sch=ck_io[26]
#set_property -dict { PACKAGE_PIN U12 IOSTANDARD LVCMOS33 } [get_ports { ck_io27 }]; #IO_L2N_T0_34 Sch=ck_io[27]
#set_property -dict { PACKAGE_PIN U13 IOSTANDARD LVCMOS33 } [get_ports { ck_io28 }]; #IO_L3P_T0_DQS_PUDC_B_34 Sch=ck_io[28]
#set_property -dict { PACKAGE_PIN V15 IOSTANDARD LVCMOS33 } [get_ports { ck_io29 }]; #IO_L10P_T1_34 Sch=ck_io[29]
#set_property -dict { PACKAGE_PIN T16 IOSTANDARD LVCMOS33 } [get_ports { ck_io30 }]; #IO_L9P_T1_DQS_34 Sch=ck_io[30]
#set_property -dict { PACKAGE_PIN U17 IOSTANDARD LVCMOS33 } [get_ports { ck_io31 }]; #IO_L9N_T1_DQS_34 Sch=ck_io[31]
#set_property -dict { PACKAGE_PIN T17 IOSTANDARD LVCMOS33 } [get_ports { ck_io32 }]; #IO_L20P_T3_34 Sch=ck_io[32]
#set_property -dict { PACKAGE_PIN R18 IOSTANDARD LVCMOS33 } [get_ports { ck_io33 }]; #IO_L20N_T3_34 Sch=ck_io[33]
#set_property -dict { PACKAGE_PIN P18 IOSTANDARD LVCMOS33 } [get_ports { ck_io34 }]; #IO_L23N_T3_34 Sch=ck_io[34]
#set_property -dict { PACKAGE_PIN N17 IOSTANDARD LVCMOS33 } [get_ports { ck_io35 }]; #IO_L23P_T3_34 Sch=ck_io[35]
#set_property -dict { PACKAGE_PIN M17 IOSTANDARD LVCMOS33 } [get_ports { ck_io36 }]; #IO_L8P_T1_AD10P_35 Sch=ck_io[36]
#set_property -dict { PACKAGE_PIN L17 IOSTANDARD LVCMOS33 } [get_ports { ck_io37 }]; #IO_L11N_T1_SRCC_35 Sch=ck_io[37]
#set_property -dict { PACKAGE_PIN H17 IOSTANDARD LVCMOS33 } [get_ports { ck_io38 }]; #IO_L13N_T2_MRCC_35 Sch=ck_io[38]
#set_property -dict { PACKAGE_PIN H18 IOSTANDARD LVCMOS33 } [get_ports { ck_io39 }]; #IO_L14N_T2_AD4N_SRCC_35 Sch=ck_io[39]
#set_property -dict { PACKAGE_PIN G18 IOSTANDARD LVCMOS33 } [get_ports { ck_io40 }]; #IO_L16N_T2_35 Sch=ck_io[40]
#set_property -dict { PACKAGE_PIN L20 IOSTANDARD LVCMOS33 } [get_ports { ck_io41 }]; #IO_L9N_T1_DQS_AD3N_35 Sch=ck_io[41]
## ChipKit SPI
#set_property -dict { PACKAGE_PIN W15 IOSTANDARD LVCMOS33 } [get_ports { ck_miso }]; #IO_L10N_T1_34 Sch=ck_miso
#set_property -dict { PACKAGE_PIN T12 IOSTANDARD LVCMOS33 } [get_ports { ck_mosi }]; #IO_L2P_T0_34 Sch=ck_mosi
#set_property -dict { PACKAGE_PIN H15 IOSTANDARD LVCMOS33 } [get_ports { ck_sck }]; #IO_L19P_T3_35 Sch=ck_sck
#set_property -dict { PACKAGE_PIN F16 IOSTANDARD LVCMOS33 } [get_ports { ck_ss }]; #IO_L6P_T0_35 Sch=ck_ss
## ChipKit I2C
#set_property -dict { PACKAGE_PIN P16 IOSTANDARD LVCMOS33 } [get_ports { ck_scl }]; #IO_L24N_T3_34 Sch=ck_scl
#set_property -dict { PACKAGE_PIN P15 IOSTANDARD LVCMOS33 } [get_ports { ck_sda }]; #IO_L24P_T3_34 Sch=ck_sda
##Misc. ChipKit signals
#set_property -dict { PACKAGE_PIN M20 IOSTANDARD LVCMOS33 } [get_ports { ck_ioa }]; #IO_L7N_T1_AD2N_35 Sch=ck_ioa
## User Digital I/O Header J1
#set_property -dict { PACKAGE_PIN L19 IOSTANDARD LVCMOS33 } [get_ports { user_dio[1] }]; #IO_L9P_T1_DQS_AD3P_35 Sch=user_dio[1]
#set_property -dict { PACKAGE_PIN M19 IOSTANDARD LVCMOS33 } [get_ports { user_dio[2] }]; #IO_L7P_T1_AD2P_35 Sch=user_dio[2]
#set_property -dict { PACKAGE_PIN N20 IOSTANDARD LVCMOS33 } [get_ports { user_dio[3] }]; #IO_L14P_T2_SRCC_34 Sch=user_dio[3]
#set_property -dict { PACKAGE_PIN P20 IOSTANDARD LVCMOS33 } [get_ports { user_dio[4] }]; #IO_L14N_T2_SRCC_34 Sch=user_dio[4]
#set_property -dict { PACKAGE_PIN P19 IOSTANDARD LVCMOS33 } [get_ports { user_dio[5] }]; #IO_L13N_T2_MRCC_34 Sch=user_dio[5]
#set_property -dict { PACKAGE_PIN R19 IOSTANDARD LVCMOS33 } [get_ports { user_dio[6] }]; #IO_0_34 Sch=user_dio[6]
#set_property -dict { PACKAGE_PIN T20 IOSTANDARD LVCMOS33 } [get_ports { user_dio[7] }]; #IO_L15P_T2_DQS_34 Sch=user_dio[7]
#set_property -dict { PACKAGE_PIN T19 IOSTANDARD LVCMOS33 } [get_ports { user_dio[8] }]; #IO_25_34 Sch=user_dio[8]
#set_property -dict { PACKAGE_PIN U20 IOSTANDARD LVCMOS33 } [get_ports { user_dio[9] }]; #IO_L15N_T2_DQS_34 Sch=user_dio[9]
#set_property -dict { PACKAGE_PIN V20 IOSTANDARD LVCMOS33 } [get_ports { user_dio[10] }]; #IO_L16P_T2_34 Sch=user_dio[10]
#set_property -dict { PACKAGE_PIN W20 IOSTANDARD LVCMOS33 } [get_ports { user_dio[11] }]; #IO_L16N_T2_34 Sch=user_dio[11]
#set_property -dict { PACKAGE_PIN K19 IOSTANDARD LVCMOS33 } [get_ports { user_dio[12] }]; #IO_L10P_T1_AD11P_35 Sch=user_dio[12]
/*
* Copyright (C) 2021 Jonathan Certes
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
/**
* \brief
* Finite state machine to decode a A-sync alignment synchronization packet.
*
* \details
* Output busy rises when header (trace_data == 8'h00) is received. It stays up
* until ready is set or a reset is triggered. It falls when ready and not
* receiving a header (trace_data == 8'h00) in the next state. It also falls
* when a reset is triggered.
*
* The decoding is ready once it receives a sequence of four or more 8'h00
* followed by one 8'h80. It is not ready when it receives 8'h00. Having a
* reset makes it not ready.
*
* More informations in ARM Coresight PFT architecture specification ;
* subsection A-sync, alignment synchronization packet.
*/
module async_decompress
(
input nrst, //!< low level active reset
input clk, //!< clock
input [7:0] trace_data, //!< Byte-aligned trace data
input trace_ctl, //!< active when 0
//
output busy, //!< indicates that the decoding is ongoing
output ready //!< packet boundary alignment has terminated
);
localparam [1:0] state_start = 2'b00;
localparam [1:0] state_header = 2'b01;
localparam [1:0] state_end = 2'b10;
reg [1:0] state;
reg [2:0] count;
//
always @( posedge(clk) ) begin
if ( nrst == 1'b0 ) begin
count <= 0;
state <= state_start;
end
else begin
if ( trace_ctl == 1'b0 ) begin
case ( state )
state_start : begin
if ( trace_data == 8'h00 ) begin
state <= state_header;
count <= 1;
end
else begin
state <= state_start;
count <= 0;
end
end
state_header : begin
if ( trace_data == 8'h00 ) begin
state <= state_header;
if ( count < 4 ) begin
count <= count + 1;
end
else begin
count <= 4;
end
end
else if ( trace_data == 8'h80 && count == 4 ) begin
// here it must be ready!
state <= state_end;
count <= 0;
end
else begin
state <= state_start;
count <= 0;
end
end
state_end : begin
if ( trace_data == 8'h00 ) begin
state <= state_header;
count <= 1;
end
else begin
// here it must be ready!
state <= state_end;
count <= 1;
end
end
default : begin
if ( trace_data == 8'h00 ) begin
state <= state_header;
count <= 1;
end
else begin
state <= state_start;
count <= 0;
end
end
endcase
end
end
end
assign busy = (nrst == 1'b1) && (
(state == state_start) && (trace_ctl == 1'b0 && trace_data == 8'h00)
|| (state == state_header)
|| (state == state_end) && (trace_ctl == 1'b0 && trace_data == 8'h00)
// handling incorrect behaviour:
|| (state != state_start) && (state != state_header) && (state != state_end)
);
assign ready = (nrst == 1'b1) && (
(state == state_header)
&& (trace_ctl == 1'b0)
&& (trace_data == 8'h80 && count == 4)
||
(state == state_end)
&& (trace_ctl == 1'b0)
&& (trace_data != 8'h00)
);
endmodule
/*
* Copyright (C) 2021 Jonathan Certes
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
/* verilator lint_off UNUSED */
/**
* \brief
* TODO
*/
module coresight2pl
#(
parameter p_none = 4'b0000,
parameter p_isync = 4'b0001,
parameter p_atom = 4'b0010,
parameter p_branch = 4'b0011,
parameter p_waypoint = 4'b0100,
parameter p_trigger = 4'b0101,
parameter p_contextid = 4'b0110,
parameter p_vmid = 4'b0111,
parameter p_timestamp = 4'b1000,
parameter p_except = 4'b1001,
parameter p_ignore = 4'b1010
) (
input nrst, //!< low level active reset
input clk, //!< clock
input [7:0] trace_data, //!< Byte-aligned trace data
input trace_ctl, //!< active when 0
output decompress_error //!< same as \ref overall_pft_trace_decompress output
//! with the same name
);
/* connections between packet decompressers and the overall PFT trace
decompresser: */
wire async_enable; wire async_busy;
wire async_ready;
//
wire packets_enable; wire [3:0] available_packet;
wire packet_ready;
/* connections between packet decompressers the packets decoder: */
wire [3:0] data_size;
wire [7:0] data__0;
wire [7:0] data__1;
wire [7:0] data__2;
wire [7:0] data__3;
wire [7:0] data__4;
wire [7:0] data__5;
wire [7:0] data__6;
wire [7:0] data__7;
wire [7:0] data__8;
wire [7:0] data__9;
wire [7:0] data_10;
wire [7:0] data_11;
wire [7:0] data_12;
wire [7:0] data_13;
wire [7:0] data_14;
/* connections between the packets decoder and the transducer: */
wire [1:0] decoded_isetstate;
wire [31:0] decoded_address;
wire hyp;
wire altis;
wire ns;
wire [1:0] isync_reason;
wire [31:0] cyclecount;
wire [31:0] contextid;
wire atom_f;
wire [8:0] decoded_exception;
/************************************
** overall PFT trace decompresser **
************************************/
overall_pft_trace_decompress i_overall_pft_trace_decompress(
/* connections to inputs: */
.nrst( nrst ),
.clk( clk ),
/* connections to packet decompressers: */
.async_enable( async_enable ),
.async_busy( async_busy ),
.async_ready( async_ready ),
//
.packets_enable( packets_enable ),
.available_packet( available_packet ),
.packet_ready( packet_ready ),
/* connections to outputs: */
.decompress_error( decompress_error )
);
/**************************
** packet decompressers **
**************************/
async_decompress i_async_decompress (
/* connections to inputs: */
.nrst( nrst & async_enable ),
.clk( clk ),
.trace_data( trace_data ),
.trace_ctl( trace_ctl ),
/* connections to the decoder: */
.busy( async_busy ),
.ready( async_ready )
);
packets_decompresser #(
.p_none( p_none ),
.p_isync( p_isync ),
.p_atom( p_atom ),
.p_branch( p_branch ),
.p_waypoint( p_waypoint ),
.p_trigger( p_trigger ),
.p_contextid( p_contextid ),
.p_vmid( p_vmid ),
.p_timestamp( p_timestamp ),
.p_except( p_except ),
.p_ignore( p_ignore )
) i_packets_decompresser (
/* connections to inputs: */
.nrst( nrst & packets_enable ),
.clk( clk ),
.trace_data( trace_data ),
.trace_ctl( trace_ctl ),
/* connections to the decoder: */
.available_packet( available_packet ),
.ready( packet_ready ),
.data__0( data__0 ),
.data__1( data__1 ),
.data__2( data__2 ),
.data__3( data__3 ),
.data__4( data__4 ),
.data__5( data__5 ),
.data__6( data__6 ),
.data__7( data__7 ),
.data__8( data__8 ),
.data__9( data__9 ),
.data_10( data_10 ),
.data_11( data_11 ),
.data_12( data_12 ),
.data_13( data_13 ),
.data_14( data_14 ),
//
.data_size( data_size )
);
/*********************
** packets decoder **
*********************/
packets_decoder i_packets_decoder(
.nrst( nrst ),
.clk( clk ),
/* connections to packets decompresser: */
.available_packet( available_packet ),
.packet_ready( packet_ready ),
.data__0( data__0 ),
.data__1( data__1 ),
.data__2( data__2 ),
.data__3( data__3 ),
.data__4( data__4 ),
.data__5( data__5 ),
.data__6( data__6 ),
.data__7( data__7 ),
.data__8( data__8 ),
.data__9( data__9 ),
.data_10( data_10 ),
.data_11( data_11 ),
.data_12( data_12 ),
.data_13( data_13 ),
.data_14( data_14 ),
/* connections to the transducer */
.decoded_isetstate( decoded_isetstate ),
.decoded_address( decoded_address ),
.hyp( hyp ),
.altis( altis ),
.ns( ns ),
.isync_reason( isync_reason ),
.cyclecount( cyclecount ),
.contextid( contextid ),
.atom_f( atom_f ),
.decoded_exception( decoded_exception )
);
endmodule
/*
* Copyright (C) 2021 Jonathan Certes
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
/* verilator lint_off UNUSED */
/**
* \brief
* Overall PFT trace decompression flow.
*
* \details
* See ARM Coresight PFT architecture specification, Appendix B: Trace
* Decompresser Operation.
*/
module overall_pft_trace_decompress
#(
parameter p_none = 4'b0000,
parameter p_isync = 4'b0001,
parameter p_atom = 4'b0010,
parameter p_branch = 4'b0011,
parameter p_waypoint = 4'b0100,
parameter p_trigger = 4'b0101,
parameter p_contextid = 4'b0110,
parameter p_vmid = 4'b0111,
parameter p_timestamp = 4'b1000,
parameter p_except = 4'b1001,
parameter p_ignore = 4'b1010
) (
input nrst, //!< low level active reset
input clk, //!< clock
output async_enable, //!< consider boundary alignment packet headers
input async_busy, //!< boundary alignment packet is ongoing
input async_ready, //!< boundary alignment packet has terminated
//
output packets_enable, //!< enables the packets decompresser
input [3:0] available_packet, //!< indicates which packet is currently decompressing
input packet_ready, //!< indicates that the packet is decompressed
output reg decompress_error //!< when I-sync is periodic and there is a
//! mismatch between current and last states
);
/****************************************************************************/
/**
* \brief
* Changes state to either <tt> state_continue_scan </tt> or <tt>
* state_identify_packet </tt> depening on <tt> r_discard_packets </tt>.
*/
task backToIdentifyPacket();
begin
if ( r_discard_packets == 1'b1 ) begin
state <= state_continue_scan;
end
else begin
state <= state_identify_packet;
end
end
endtask
/****************************************************************************/
// to store and check for errors in the decompression:
reg [1:0] r_currentstate_isetstate;
reg [31:0] r_currentstate_address;
reg r_currentstate_ns;
reg [31:0] r_currentstate_contextid;
// to discard non-isync packets:
reg r_discard_packets;
localparam [2:0] state_scan_trace_stream = 3'b000;
localparam [2:0] state_continue_scan = 3'b001;
localparam [2:0] state_identify_packet = 3'b010;
localparam [2:0] state_process_async = 3'b011;
localparam [2:0] state_process_packets = 3'b110;
localparam [2:0] state_error = 3'b111;
reg [2:0] state;
initial begin
state = state_scan_trace_stream;
r_discard_packets = 1'b1;
//
decompress_error = 1'b0;
end
always @( posedge(clk) ) begin
if ( nrst == 1'b0 ) begin
state <= state_scan_trace_stream;
r_discard_packets <= 1'b1;
//
decompress_error <= 1'b0;
end
else begin
case ( state )
state_scan_trace_stream : begin
if ( async_ready ) begin
state <= state_continue_scan;
end
else begin
state <= state_scan_trace_stream;
end
end
state_continue_scan : begin
r_discard_packets <= 1'b1;
if ( async_busy ) state <= state_process_async;
else if ( available_packet != p_none ) state <= state_process_packets;
else state <= state_continue_scan;
end
state_identify_packet : begin
r_discard_packets <= 1'b0;
if ( async_busy ) state <= state_process_async;
else if ( available_packet != p_none ) state <= state_process_packets;
else state <= state_identify_packet;
end
state_process_async : begin
if ( async_ready ) begin
backToIdentifyPacket();
end
else begin
state <= state_process_async;
end
end
state_process_packets : begin
if ( packet_ready ) begin
state <= state_identify_packet;
end
else begin
state <= state_process_packets;
end
end
state_error : begin
state <= state_error; // deadlock
//
decompress_error <= 1'b1;
end
default : begin
state <= state_scan_trace_stream;
end
endcase
end
end
assign async_enable = (
(state == state_scan_trace_stream)
|| (state == state_continue_scan)
|| (state == state_identify_packet)
|| (state == state_process_async)
);
assign packets_enable = (
(state == state_continue_scan)
|| (state == state_identify_packet)
|| (state == state_process_packets)
);
endmodule
/*
* Copyright (C) 2021 Jonathan Certes
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <https://www.gnu.org/licenses/>.
*
*/
/* verilator lint_off MODDUP */
`include "packets_decoder_core.v"
/* verilator lint_on MODDUP */
/**
* \brief
* Wrapper to connect the output vectors in a human readable format.
*/
module packets_decoder
(
input nrst, //!< low level active reset
input clk, //!< clock
input [3:0] available_packet, //!< indicates which packet is currently decompressing
input packet_ready, //!< indicates that the packet is decompressed
input [7:0] data__0, //!< packet byte index 0
input [7:0] data__1, //!< packet byte index 1
input [7:0] data__2, //!< packet byte index 2
input [7:0] data__3, //!< packet byte index 3
input [7:0] data__4, //!< packet byte index 4
input [7:0] data__5, //!< packet byte index 5
input [7:0] data__6, //!< packet byte index 6
input [7:0] data__7, //!< packet byte index 7
input [7:0] data__8, //!< packet byte index 8
input [7:0] data__9, //!< packet byte index 9
input [7:0] data_10, //!< packet byte index 10
input [7:0] data_11, //!< packet byte index 11
input [7:0] data_12, //!< packet byte index 12
input [7:0] data_13, //!< packet byte index 13
input [7:0] data_14, //!< packet byte index 14
output [1:0] decoded_isetstate,//!< instruction set state
output [31:0] decoded_address, //!< the target address
output hyp, //!< tells branching into Hyp mode
output altis, //!< gives the instruction set state
output ns, //!< set if in Non-secure state
output [31:0] cyclecount, //!< cycle count informations
output [1:0] isync_reason, //!< reason why a I-sync packet was generated
output [31:0] contextid, //!< current Context ID
output atom_f, //!< E or N atom
output [8:0] decoded_exception //!< exception informations
);
/****************************************************************************/
wire decoded_address__0; wire decoded_address_16;
wire decoded_address__1; wire decoded_address_17;
wire decoded_address__2; wire decoded_address_18;
wire decoded_address__3; wire decoded_address_19;
wire decoded_address__4; wire decoded_address_20;
wire decoded_address__5; wire decoded_address_21;
wire decoded_address__6; wire decoded_address_22;
wire decoded_address__7; wire decoded_address_23;
wire decoded_address__8; wire decoded_address_24;
wire decoded_address__9; wire decoded_address_25;
wire decoded_address_10; wire decoded_address_26;
wire decoded_address_11; wire decoded_address_27;
wire decoded_address_12; wire decoded_address_28;
wire decoded_address_13; wire decoded_address_29;
wire decoded_address_14; wire decoded_address_30;
wire decoded_address_15; wire decoded_address_31;
//
wire cyclecount__0; wire cyclecount_16;
wire cyclecount__1; wire cyclecount_17;
wire cyclecount__2; wire cyclecount_18;
wire cyclecount__3; wire cyclecount_19;
wire cyclecount__4; wire cyclecount_20;
wire cyclecount__5; wire cyclecount_21;
wire cyclecount__6; wire cyclecount_22;
wire cyclecount__7; wire cyclecount_23;
wire cyclecount__8; wire cyclecount_24;
wire cyclecount__9; wire cyclecount_25;
wire cyclecount_10; wire cyclecount_26;
wire cyclecount_11; wire cyclecount_27;
wire cyclecount_12; wire cyclecount_28;
wire cyclecount_13; wire cyclecount_29;
wire cyclecount_14; wire cyclecount_30;
wire cyclecount_15; wire cyclecount_31;
//
wire [7:0] contextid_0;
wire [7:0] contextid_1;
wire [7:0] contextid_2;
wire [7:0] contextid_3;
packets_decoder_core i_packets_decoder_core(
.nrst( nrst ),
.clk( clk ),
/* connections to packets decompresser: */
.available_packet( available_packet ),
.packet_ready( packet_ready ),
.data__0( data__0 ),
.data__1( data__1 ),
.data__2( data__2 ),
.data__3( data__3 ),
.data__4( data__4 ),
.data__5( data__5 ),
.data__6( data__6 ),
.data__7( data__7 ),
.data__8( data__8 ),
.data__9( data__9 ),
.data_10( data_10 ),
.data_11( data_11 ),
.data_12( data_12 ),
.data_13( data_13 ),
.data_14( data_14 ),
/* outputs: */
.decoded_isetstate( decoded_isetstate ),
.hyp( hyp ),
.altis( altis ),
.ns( ns ),
.isync_reason( isync_reason ),
.decoded_address__0( decoded_address__0 ),
.decoded_address__1( decoded_address__1 ),
.decoded_address__2( decoded_address__2 ),
.decoded_address__3( decoded_address__3 ),
.decoded_address__4( decoded_address__4 ),
.decoded_address__5( decoded_address__5 ),
.decoded_address__6( decoded_address__6 ),
.decoded_address__7( decoded_address__7 ),
.decoded_address__8( decoded_address__8 ),
.decoded_address__9( decoded_address__9 ),
.decoded_address_10( decoded_address_10 ),
.decoded_address_11( decoded_address_11 ),
.decoded_address_12( decoded_address_12 ),
.decoded_address_13( decoded_address_13 ),
.decoded_address_14( decoded_address_14 ),
.decoded_address_15( decoded_address_15 ),
.decoded_address_16( decoded_address_16 ),
.decoded_address_17( decoded_address_17 ),
.decoded_address_18( decoded_address_18 ),
.decoded_address_19( decoded_address_19 ),
.decoded_address_20( decoded_address_20 ),
.decoded_address_21( decoded_address_21 ),
.decoded_address_22( decoded_address_22 ),
.decoded_address_23( decoded_address_23 ),
.decoded_address_24( decoded_address_24 ),
.decoded_address_25( decoded_address_25 ),
.decoded_address_26( decoded_address_26 ),
.decoded_address_27( decoded_address_27 ),
.decoded_address_28( decoded_address_28 ),
.decoded_address_29( decoded_address_29 ),
.decoded_address_30( decoded_address_30 ),
.decoded_address_31( decoded_address_31 ),
.cyclecount__0( cyclecount__0 ),
.cyclecount__1( cyclecount__1 ),
.cyclecount__2( cyclecount__2 ),
.cyclecount__3( cyclecount__3 ),
.cyclecount__4( cyclecount__4 ),
.cyclecount__5( cyclecount__5 ),
.cyclecount__6( cyclecount__6 ),
.cyclecount__7( cyclecount__7 ),
.cyclecount__8( cyclecount__8 ),
.cyclecount__9( cyclecount__9 ),
.cyclecount_10( cyclecount_10 ),
.cyclecount_11( cyclecount_11 ),
.cyclecount_12( cyclecount_12 ),
.cyclecount_13( cyclecount_13 ),
.cyclecount_14( cyclecount_14 ),
.cyclecount_15( cyclecount_15 ),
.cyclecount_16( cyclecount_16 ),
.cyclecount_17( cyclecount_17 ),
.cyclecount_18( cyclecount_18 ),
.cyclecount_19( cyclecount_19 ),
.cyclecount_20( cyclecount_20 ),
.cyclecount_21( cyclecount_21 ),
.cyclecount_22( cyclecount_22 ),
.cyclecount_23( cyclecount_23 ),
.cyclecount_24( cyclecount_24 ),
.cyclecount_25( cyclecount_25 ),
.cyclecount_26( cyclecount_26 ),
.cyclecount_27( cyclecount_27 ),
.cyclecount_28( cyclecount_28 ),
.cyclecount_29( cyclecount_29 ),
.cyclecount_30( cyclecount_30 ),
.cyclecount_31( cyclecount_31 ),
.contextid_0( contextid_0 ),
.contextid_1( contextid_1 ),
.contextid_2( contextid_2 ),
.contextid_3( contextid_3 ),
.atom_f( atom_f ),
.decoded_exception( decoded_exception )
);
assign decoded_address = { decoded_address_31,
decoded_address_30,
decoded_address_29,
decoded_address_28,
decoded_address_27,
decoded_address_26,
decoded_address_25,
decoded_address_24,
decoded_address_23,
decoded_address_22,
decoded_address_21,
decoded_address_20,
decoded_address_19,
decoded_address_18,
decoded_address_17,
decoded_address_16,
decoded_address_15,
decoded_address_14,
decoded_address_13,
decoded_address_12,
decoded_address_11,
decoded_address_10,
decoded_address__9,
decoded_address__8,
decoded_address__7,
decoded_address__6,
decoded_address__5,
decoded_address__4,
decoded_address__3,
decoded_address__2,
decoded_address__1,
decoded_address__0
};
assign cyclecount = { cyclecount_31,
cyclecount_30,
cyclecount_29,
cyclecount_28,
cyclecount_27,
cyclecount_26,
cyclecount_25,
cyclecount_24,
cyclecount_23,
cyclecount_22,
cyclecount_21,
cyclecount_20,
cyclecount_19,
cyclecount_18,
cyclecount_17,
cyclecount_16,
cyclecount_15,
cyclecount_14,
cyclecount_13,
cyclecount_12,
cyclecount_11,
cyclecount_10,
cyclecount__9,
cyclecount__8,
cyclecount__7,
cyclecount__6,
cyclecount__5,
cyclecount__4,
cyclecount__3,
cyclecount__2,
cyclecount__1,
cyclecount__0
};
assign contextid = { contextid_3,
contextid_2,
contextid_1,
contextid_0
};
endmodule
This diff is collapsed.
This diff is collapsed.
This diff is collapsed.
TESTBENCH = main.cc
TOP = decode
ARGS = ./data_fetch.gdb ./data_attack_1.gdb ./data_attack_2.gdb \
./data_attack_3.gdb ./data_attack_4.gdb
HDL = decode.v \
../../coresight2pl/async_decompress.v \
../../coresight2pl/packets_decoder_core.v \
../../coresight2pl/packets_decoder.v \
../../coresight2pl/packets_decompresser.v \
../../coresight2pl/overall_pft_trace_decompress.v \
../../coresight2pl/coresight2pl.v
#==============================================================================
VERILATOR_MK = $(addprefix obj_dir/V, $(addsuffix .mk, ${TOP} ))
VERILATOR_BIN = $(addprefix obj_dir/V, ${TOP} )
all : gtkwaverc.tcl output_fetch.vcd \
output_attack_1.vcd output_attack_2.vcd \
output_attack_3.vcd output_attack_4.vcd
gtkwave --script=gtkwaverc.tcl output_fetch.vcd &
gtkwave --script=gtkwaverc.tcl output_attack_1.vcd &
gtkwave --script=gtkwaverc.tcl output_attack_2.vcd &
gtkwave --script=gtkwaverc.tcl output_attack_3.vcd &
gtkwave --script=gtkwaverc.tcl output_attack_4.vcd &
# (3) run:
output_fetch.vcd output_attack_1.vcd output_attack_2.vcd \
output_attack_3.vcd output_attack_4.vcd : ${VERILATOR_BIN} ${ARGS}
./${VERILATOR_BIN} ./data_fetch.gdb
mv output.vcd output_fetch.vcd
./${VERILATOR_BIN} ./data_attack_1.gdb
mv output.vcd output_attack_1.vcd
./${VERILATOR_BIN} ./data_attack_2.gdb
mv output.vcd output_attack_2.vcd
./${VERILATOR_BIN} ./data_attack_3.gdb
mv output.vcd output_attack_3.vcd
./${VERILATOR_BIN} ./data_attack_4.gdb
mv output.vcd output_attack_4.vcd
# (2) make with verilator:
${VERILATOR_BIN} : ${VERILATOR_MK} ${TESTBENCH}
make --directory=$(dir ${VERILATOR_MK}) --file=$(notdir ${VERILATOR_MK})
# (1) translate with verilator (ignore module duplicates because of includes):
${VERILATOR_MK} : ${HDL} ${TESTBENCH}
verilator -Wall --trace --relative-includes -Wno-MODDUP \
--sc ${HDL} --top-module ${TOP} --exe ${TESTBENCH}
clean :
$(RM) -r obj_dir
$(RM) output.vcd output_fetch.vcd
$(RM) output_attack_1.vcd output_attack_2.vcd
$(RM) output_attack_3.vcd output_attack_4.vcd
0x42000000: 0x80010003 0x00000003 0x00000003 0x00000003
0x42000010: 0x00010003 0x00010003 0x00010003 0x00010003
0x42000020: 0x00010003 0x00010003 0x00010003 0x00010003
0x42000030: 0x00010003 0x00010003 0x00010003 0x00010003
0x42000040: 0x00010003 0x00010003 0x00010003 0x80090003
0x42000050: 0x00080003 0x00080003 0x00080003 0x00090003
0x42000060: 0x00090003 0x00090003 0x00090003 0x00090003
0x42000070: 0x00090003 0x00090003 0x00090003 0x00090003
0x42000080: 0x00090003 0x00090003 0x00090003 0x00090003
0x42000090: 0x00090003 0x00090003 0x80110003 0x00100003
0x420000a0: 0x00100003 0x00100003 0x00110003 0x00110003
0x420000b0: 0x00110003 0x00110003 0x00110003 0x00110003
0x420000c0: 0x00110003 0x00110003 0x00110003 0x00110003
0x420000d0: 0x00110003 0x00110003 0x00110003 0x00110003
0x420000e0: 0x00110003 0x80190003 0x00180003 0x00180003
0x420000f0: 0x00180003 0x00190003 0x00190003 0x00190003
0x42000100: 0x00190003 0x00190003 0x00190003 0x00190003
0x42000110: 0x00190003 0x00190003 0x00190003 0x00190003
0x42000120: 0x00190003 0x00190003 0x00190003 0x00190003
0x42000130: 0x80210003 0x00200003 0x00200003 0x00200003
0x42000140: 0x00210003 0x00210003 0x00210003 0x00210003
0x42000150: 0x00210003 0x00210003 0x00210003 0x00210003
0x42000160: 0x00210003 0x00210003 0x00210003 0x00210003
0x42000170: 0x00210003 0x00210003 0x00210003 0x80290003
0x42000180: 0x00280003 0x00280003 0x00280003 0x00290003
0x42000190: 0x00290003 0x00290003 0x00290003 0x00290003
0x420001a0: 0x00290003 0x00290003 0x00290003 0x00290100
0x420001b0: 0x00290010 0x00290000 0x00290000 0x00290040
0x420001c0: 0x00290000 0x00290042 0x80310198 0x0030014e
0x420001d0: 0x00300138 0x00300008 0x00310000 0x00310000
0x420001e0: 0x00310000 0x00310000 0x00310022 0x00310003
0x420001f0: 0x00310003 0x00310003 0x00310003 0x00310003
0x42000200: 0x00310003 0x00310003 0x00310003 0x00310003
0x42000210: 0x00310003 0x80390003 0x00380003 0x00380003
0x42000220: 0x00380003 0x00390003 0x00390003 0x00390003
0x42000230: 0x00390003 0x00390003 0x00390003 0x00390003
0x42000240: 0x00390003 0x00390003 0x00390003 0x00390003
0x42000250: 0x00390003 0x00390003 0x00390003 0x00390003
0x42000260: 0x80410003 0x00400003 0x00400003 0x00400003
0x42000270: 0x80490003 0x00480003 0x00480003 0x00480003
0x42000280: 0x80510003 0x00500003 0x00500003 0x00500003
0x42000290: 0x80590003 0x00580003 0x00580003 0x00580003
0x420002a0: 0x80610003 0x00600003 0x00600003 0x00600003
0x420002b0: 0x80690003 0x00680003 0x00680003 0x00680003
0x420002c0: 0x80710003 0x00700003 0x00700003 0x00700003
0x420002d0: 0x80790003 0x00780003 0x00780003 0x00780003
0x420002e0: 0x00790003 0x00790003 0x00790003 0x00790003
0x420002f0: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000300: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000310: 0x00790003 0x00790003 0x00790003 0x80410003
0x42000320: 0x00400003 0x00400003 0x00400003 0x80490003
0x42000330: 0x00480003 0x00480003 0x00480003 0x80510003
0x42000340: 0x00500003 0x00500003 0x00500003 0x80590003
0x42000350: 0x00580003 0x00580003 0x00580003 0x80610003
0x42000360: 0x00600003 0x00600003 0x00600003 0x80690003
0x42000370: 0x00680003 0x00680003 0x00680003 0x80710003
0x42000380: 0x00700003 0x00700003 0x00700003 0x80790003
0x42000390: 0x00780003 0x00780003 0x00780003 0x00790003
0x420003a0: 0x00790003 0x00790003 0x00790003 0x00790003
0x420003b0: 0x00790003 0x00790003 0x00790003 0x00790003
0x420003c0: 0x00790003 0x00790003 0x00790003 0x00790003
0x420003d0: 0x00790003 0x00790003 0x00790003 0x00790003
0x420003e0: 0x00790003 0x80810003 0x00800003 0x00800003
0x420003f0: 0x00800003 0x80890003 0x00880003 0x00880003
0x42000400: 0x00880003 0x80910003 0x00900003 0x00900003
0x42000410: 0x00900003 0x80990003 0x00980003 0x00980003
0x42000420: 0x00980003 0x80a10003 0x00a00003 0x00a00003
0x42000430: 0x00a00003 0x80a90003 0x00a80003 0x00a80003
0x42000440: 0x00a80003 0x80b10003 0x00b00003 0x00b00003
0x42000450: 0x00b00003 0x80b90003 0x00b80003 0x00b80003
0x42000460: 0x00b80003 0x00b90003 0x00b90003 0x00b90003
0x42000470: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000480: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000490: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420004a0: 0x80810003 0x00800003 0x00800003 0x00800003
0x420004b0: 0x80890003 0x00880003 0x00880003 0x00880003
0x420004c0: 0x80910003 0x00900003 0x00900003 0x00900003
0x420004d0: 0x80990003 0x00980003 0x00980003 0x00980003
0x420004e0: 0x80a10003 0x00a00003 0x00a00003 0x00a00003
0x420004f0: 0x80a90003 0x00a80003 0x00a80003 0x00a80003
0x42000500: 0x80b10003 0x00b00003 0x00b00003 0x00b00003
0x42000510: 0x80b90003 0x00b80003 0x00b80003 0x00b80003
0x42000520: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000530: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000540: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000550: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000560: 0x00b90003 0x00b90003 0x80c10003 0x00c00003
0x42000570: 0x00c00003 0x00c00003 0x80c90003 0x00c80003
0x42000580: 0x00c80003 0x00c80003 0x80d10003 0x00d00003
0x42000590: 0x00d000e0 0x00d00048 0x80d90018 0x00d80042
0x420005a0: 0x00d80003 0x00d80003 0x80e10003 0x00e00003
0x420005b0: 0x00e00003 0x00e00003 0x80e90003 0x00e80003
0x420005c0: 0x00e80003 0x00e80003 0x80f10003 0x00f00003
0x420005d0: 0x00f00003 0x00f00003 0x80f90003 0x00f80003
0x420005e0: 0x00f80003 0x00f80003 0x00f90003 0x00f90003
0x420005f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000600: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000610: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000620: 0x00f90003 0x80c10003 0x00c00003 0x00c00003
0x42000630: 0x00c00003 0x80c90003 0x00c80003 0x00c80003
0x42000640: 0x00c80003 0x80d10003 0x00d00003 0x00d00003
0x42000650: 0x00d00003 0x80d90003 0x00d80003 0x00d80003
0x42000660: 0x00d80003 0x80e10003 0x00e00003 0x00e00003
0x42000670: 0x00e00003 0x80e90003 0x00e80003 0x00e80003
0x42000680: 0x00e80003 0x80f10003 0x00f00003 0x00f00003
0x42000690: 0x00f00003 0x80f90003 0x00f80003 0x00f80003
0x420006a0: 0x00f80003 0x00f90003 0x00f90003 0x00f90003
0x420006b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000700: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000710: 0x00f90003 0x00f90090 0x00f90062 0x00f90062
0x42000720: 0x00f900d8 0x00f9003e 0x00f9018a 0x00f90118
0x42000730: 0x00f90140 0x00f90003 0x00f90003 0x00f90003
0x42000740: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000750: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000760: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000770: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000780: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000790: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000800: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000810: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000820: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000830: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000840: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000850: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000860: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000870: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000880: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000890: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000900: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000910: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000920: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000930: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000940: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000950: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000960: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000970: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000980: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000990: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000aa0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ab0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ac0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ad0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ae0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000af0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ba0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000be0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bf0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ca0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ce0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cf0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000da0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000db0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000dc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000dd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000de0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000df0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ea0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000eb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ec0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ed0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ee0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ef0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fa0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fe0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ff0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000000: 0x80010003 0x00000003 0x00000003 0x00000003
0x42000010: 0x80090003 0x00080003 0x00080003 0x00080003
0x42000020: 0x80110003 0x00100003 0x00100003 0x00100003
0x42000030: 0x80190003 0x00180003 0x00180003 0x00180003
0x42000040: 0x80210003 0x00200003 0x00200003 0x00200003
0x42000050: 0x80290003 0x00280003 0x00280003 0x00280003
0x42000060: 0x80310003 0x00300003 0x00300003 0x00300003
0x42000070: 0x80390003 0x00380003 0x00380003 0x00380003
0x42000080: 0x00390003 0x00390003 0x00390003 0x00390003
0x42000090: 0x00390003 0x00390003 0x00390003 0x00390003
0x420000a0: 0x00390003 0x00390003 0x00390003 0x00390003
0x420000b0: 0x00390003 0x00390003 0x00390003 0x00390003
0x420000c0: 0x00390003 0x00390003 0x80410003 0x00400003
0x420000d0: 0x00400003 0x00400003 0x80490003 0x00480003
0x420000e0: 0x00480003 0x00480003 0x80510003 0x00500003
0x420000f0: 0x00500000 0x00500000 0x80590100 0x00580010
0x42000100: 0x00580000 0x00580000 0x80610040 0x00600000
0x42000110: 0x00600042 0x006001b8 0x806901a4 0x00680138
0x42000120: 0x00680008 0x00680000 0x80710000 0x00700000
0x42000130: 0x00700000 0x00700022 0x807900d8 0x00780028
0x42000140: 0x00780003 0x00780003 0x00790003 0x00790003
0x42000150: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000160: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000170: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000180: 0x00790003 0x80410003 0x00400003 0x00400003
0x42000190: 0x00400003 0x80490003 0x00480003 0x00480003
0x420001a0: 0x00480003 0x80510003 0x00500003 0x00500003
0x420001b0: 0x00500003 0x80590003 0x00580003 0x00580003
0x420001c0: 0x00580003 0x80610003 0x00600003 0x00600003
0x420001d0: 0x00600003 0x80690003 0x00680003 0x00680003
0x420001e0: 0x00680003 0x80710003 0x00700003 0x00700003
0x420001f0: 0x00700003 0x80790003 0x00780003 0x00780003
0x42000200: 0x00780003 0x00790003 0x00790003 0x00790003
0x42000210: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000220: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000230: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000240: 0x00790003 0x00790003 0x00790003 0x80810003
0x42000250: 0x00800003 0x00800003 0x00800003 0x80890003
0x42000260: 0x00880003 0x00880003 0x00880003 0x80910003
0x42000270: 0x00900003 0x00900003 0x00900003 0x80990003
0x42000280: 0x00980003 0x00980003 0x00980003 0x80a10003
0x42000290: 0x00a00003 0x00a00003 0x00a00003 0x80a90003
0x420002a0: 0x00a80003 0x00a80003 0x00a80003 0x80b10003
0x420002b0: 0x00b00003 0x00b00003 0x00b00003 0x80b90003
0x420002c0: 0x00b80003 0x00b80003 0x00b80003 0x00b90003
0x420002d0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420002e0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420002f0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000300: 0x00b90003 0x00b90003 0x80810003 0x00800003
0x42000310: 0x00800003 0x00800003 0x80890003 0x00880003
0x42000320: 0x00880003 0x00880003 0x80910003 0x00900003
0x42000330: 0x00900003 0x00900003 0x80990003 0x00980003
0x42000340: 0x00980003 0x00980003 0x80a10003 0x00a00003
0x42000350: 0x00a00003 0x00a00003 0x80a90003 0x00a80003
0x42000360: 0x00a80003 0x00a80003 0x80b10003 0x00b00003
0x42000370: 0x00b00003 0x00b00003 0x80b90003 0x00b80003
0x42000380: 0x00b80003 0x00b80003 0x00b90003 0x00b90003
0x42000390: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420003a0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420003b0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420003c0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420003d0: 0x80c10003 0x00c00003 0x00c00003 0x00c00003
0x420003e0: 0x80c90003 0x00c80003 0x00c80003 0x00c80003
0x420003f0: 0x80d10003 0x00d00003 0x00d00018 0x00d00042
0x42000400: 0x80d900c0 0x00d8003e 0x00d80003 0x00d80003
0x42000410: 0x80e10003 0x00e00003 0x00e00003 0x00e00003
0x42000420: 0x80e90003 0x00e80003 0x00e80003 0x00e80003
0x42000430: 0x80f10003 0x00f00003 0x00f00003 0x00f00003
0x42000440: 0x80f90003 0x00f80003 0x00f80003 0x00f80003
0x42000450: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000460: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000470: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000480: 0x00f90003 0x00f90003 0x00f90003 0x80c10003
0x42000490: 0x00c00003 0x00c00003 0x00c00003 0x80c90003
0x420004a0: 0x00c80003 0x00c80003 0x00c80003 0x80d10003
0x420004b0: 0x00d00003 0x00d00003 0x00d00003 0x80d90003
0x420004c0: 0x00d80003 0x00d80003 0x00d80003 0x80e10003
0x420004d0: 0x00e00003 0x00e00003 0x00e00003 0x80e90003
0x420004e0: 0x00e80003 0x00e80003 0x00e80003 0x80f10003
0x420004f0: 0x00f00003 0x00f00003 0x00f00003 0x80f90003
0x42000500: 0x00f80003 0x00f80003 0x00f80003 0x00f90003
0x42000510: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000520: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000530: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000540: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000550: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000560: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000570: 0x00f90003 0x00f90003 0x00f90062 0x00f900c0
0x42000580: 0x00f9003e 0x00f901de 0x00f90118 0x00f90140
0x42000590: 0x00f90000 0x00f900b8 0x00f90003 0x00f90003
0x420005a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000600: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000610: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000620: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000630: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000640: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000650: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000660: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000670: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000680: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000690: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000700: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000710: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000720: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000730: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000740: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000750: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000760: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000770: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000780: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000790: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000800: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000810: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000820: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000830: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000840: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000850: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000860: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000870: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000880: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000890: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000900: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000910: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000920: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000930: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000940: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000950: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000960: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000970: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000980: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000990: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000aa0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ab0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ac0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ad0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ae0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000af0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ba0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000be0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bf0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ca0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ce0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cf0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000da0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000db0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000dc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000dd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000de0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000df0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ea0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000eb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ec0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ed0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ee0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ef0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fa0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fe0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ff0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000000: 0x80010003 0x00000003 0x00000003 0x00000003
0x42000010: 0x80090003 0x00080003 0x00080003 0x00080003
0x42000020: 0x80110003 0x00100003 0x00100003 0x00100003
0x42000030: 0x80190003 0x00180003 0x00180003 0x00180003
0x42000040: 0x80210003 0x00200003 0x00200003 0x00200003
0x42000050: 0x80290003 0x00280003 0x00280003 0x00280003
0x42000060: 0x80310003 0x00300003 0x00300003 0x00300003
0x42000070: 0x80390003 0x00380003 0x00380003 0x00380003
0x42000080: 0x00390003 0x00390003 0x00390003 0x00390003
0x42000090: 0x00390003 0x00390003 0x00390003 0x00390003
0x420000a0: 0x00390003 0x00390003 0x00390003 0x00390003
0x420000b0: 0x00390003 0x00390003 0x00390003 0x80410003
0x420000c0: 0x00400003 0x00400003 0x00400003 0x80490003
0x420000d0: 0x00480003 0x00480003 0x00480003 0x80510003
0x420000e0: 0x00500003 0x00500003 0x00500003 0x80590003
0x420000f0: 0x00580000 0x00580100 0x00580010 0x80610000
0x42000100: 0x00600000 0x00600040 0x00600000 0x80690042
0x42000110: 0x00680180 0x006801ac 0x00680138 0x80710008
0x42000120: 0x00700000 0x00700000 0x00700000 0x80790000
0x42000130: 0x00780022 0x00780080 0x0078002a 0x00790018
0x42000140: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000150: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000160: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000170: 0x00790003 0x00790003 0x80410003 0x00400003
0x42000180: 0x00400003 0x00400003 0x80490003 0x00480003
0x42000190: 0x00480003 0x00480003 0x80510003 0x00500003
0x420001a0: 0x00500003 0x00500003 0x80590003 0x00580003
0x420001b0: 0x00580003 0x00580003 0x80610003 0x00600003
0x420001c0: 0x00600003 0x00600003 0x80690003 0x00680003
0x420001d0: 0x00680003 0x00680003 0x80710003 0x00700003
0x420001e0: 0x00700003 0x00700003 0x80790003 0x00780003
0x420001f0: 0x00780003 0x00780003 0x00790003 0x00790003
0x42000200: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000210: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000220: 0x00790003 0x00790003 0x00790003 0x00790003
0x42000230: 0x00790003 0x80810003 0x00800003 0x00800003
0x42000240: 0x00800003 0x80890003 0x00880003 0x00880003
0x42000250: 0x00880003 0x80910003 0x00900003 0x00900003
0x42000260: 0x00900003 0x80990003 0x00980003 0x00980003
0x42000270: 0x00980003 0x80a10003 0x00a00003 0x00a00003
0x42000280: 0x00a00003 0x80a90003 0x00a80003 0x00a80003
0x42000290: 0x00a80003 0x80b10003 0x00b00003 0x00b00003
0x420002a0: 0x00b00003 0x80b90003 0x00b80003 0x00b80003
0x420002b0: 0x00b80003 0x00b90003 0x00b90003 0x00b90003
0x420002c0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420002d0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420002e0: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420002f0: 0x80810003 0x00800003 0x00800003 0x00800003
0x42000300: 0x80890003 0x00880003 0x00880003 0x00880003
0x42000310: 0x80910003 0x00900003 0x00900003 0x00900003
0x42000320: 0x80990003 0x00980003 0x00980003 0x00980003
0x42000330: 0x80a10003 0x00a00003 0x00a00003 0x00a00003
0x42000340: 0x80a90003 0x00a80003 0x00a80003 0x00a80003
0x42000350: 0x80b10003 0x00b00003 0x00b00003 0x00b00003
0x42000360: 0x80b90003 0x00b80003 0x00b80003 0x00b80003
0x42000370: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000380: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x42000390: 0x00b90003 0x00b90003 0x00b90003 0x00b90003
0x420003a0: 0x00b90003 0x00b90003 0x00b90003 0x80c10003
0x420003b0: 0x00c00003 0x00c00003 0x00c00003 0x80c90003
0x420003c0: 0x00c80003 0x00c80003 0x00c80003 0x80d10003
0x420003d0: 0x00d00003 0x00d00003 0x00d00003 0x80d90003
0x420003e0: 0x00d80042 0x00d800c8 0x00d8003c 0x80e10062
0x420003f0: 0x00e00003 0x00e00003 0x00e00003 0x80e90003
0x42000400: 0x00e80003 0x00e80003 0x00e80003 0x80f10003
0x42000410: 0x00f00003 0x00f00003 0x00f00003 0x80f90003
0x42000420: 0x00f80003 0x00f80003 0x00f80003 0x00f90003
0x42000430: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000440: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000450: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000460: 0x00f90003 0x00f90003 0x80c10003 0x00c00003
0x42000470: 0x00c00003 0x00c00003 0x80c90003 0x00c80003
0x42000480: 0x00c80003 0x00c80003 0x80d10003 0x00d00003
0x42000490: 0x00d00003 0x00d00003 0x80d90003 0x00d80003
0x420004a0: 0x00d80003 0x00d80003 0x80e10003 0x00e00003
0x420004b0: 0x00e00003 0x00e00003 0x80e90003 0x00e80003
0x420004c0: 0x00e80003 0x00e80003 0x80f10003 0x00f00003
0x420004d0: 0x00f00003 0x00f00003 0x80f90003 0x00f80003
0x420004e0: 0x00f80003 0x00f80003 0x00f90003 0x00f90003
0x420004f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000500: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000510: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000520: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000530: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000540: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000550: 0x00f90003 0x00f90003 0x00f900c8 0x00f9003c
0x42000560: 0x00f90132 0x00f9011a 0x00f90140 0x00f90000
0x42000570: 0x00f900c8 0x00f9003c 0x00f90003 0x00f90003
0x42000580: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000590: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420005f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000600: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000610: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000620: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000630: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000640: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000650: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000660: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000670: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000680: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000690: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420006f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000700: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000710: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000720: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000730: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000740: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000750: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000760: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000770: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000780: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000790: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420007f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000800: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000810: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000820: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000830: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000840: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000850: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000860: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000870: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000880: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000890: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420008f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000900: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000910: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000920: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000930: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000940: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000950: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000960: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000970: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000980: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000990: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009a0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009b0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009c0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009d0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009e0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x420009f0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000a90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000aa0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ab0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ac0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ad0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ae0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000af0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000b90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ba0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000be0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000bf0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000c90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ca0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ce0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000cf0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000d90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000da0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000db0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000dc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000dd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000de0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000df0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000e90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ea0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000eb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ec0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ed0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ee0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ef0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f00: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f10: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f20: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f30: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f40: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f50: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f60: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f70: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f80: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000f90: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fa0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fb0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fc0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fd0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000fe0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0x42000ff0: 0x00f90003 0x00f90003 0x00f90003 0x00f90003
0% Loading or .
You are about to add 0 people to the discussion. Proceed with caution.
Please register or to comment