Makefile 1.20 KiB
#
# Copyright (C) 2022 Jonathan Certes
#
# This program is free software: you can redistribute it and/or modify it under
# the terms of the GNU General Public License as published by the Free Software
# Foundation, either version 3 of the License, or (at your option) any later
# version.
#
# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License along with
# this program. If not, see <http://www.gnu.org/licenses/>.
#
HDL = flipflop.v top.v
SCHEM =
TOP = top
# cora Z7007S:
FPGA = xc7z007sclg400-1
BOARD = digilentinc.com:cora-z7-07s:part0:1.0
XDC = constraints_coraz7.xdc
#===============================================================================
all : ${TOP}.bit
${TOP}.bit : ${HDL} ${SCHEM} ${XDC}
./vivadoMakefile.tcl \
--hdl ${HDL} --schem ${SCHEM} \
--fpga ${FPGA} --board ${BOARD} --constr ${XDC} --top ${TOP}
clean :
$(RM) -r ./vivado.workspace/ ./NA/
$(RM) vivado_*.backup.log vivado.log vivado_*.backup.jou vivado.jou
$(RM) ${TOP}.bit