Update README.md

README.md

@@ -234,7 +234,7 @@ Below is described steps to run Coremark application on CV32A6 FPGA platform, st
 
 1. First, make sure the digilent **JTAG-HS2 debug adapter** is properly connected to the **PMOD JE** connector and that the USBUART adapter is properly connected to the **PMOD JB** connector of the Zybo Z7-20 board.
 ![alt text](https://github.com/sjthales/cva6-softcore-contest/blob/master/docs/pictures/20201204_150708.jpg)
-2. Compile coremark application in `sw/app`
+2. Compile Coremark application in `sw/app`. Commands to compile Coremark application are described in `sw/app` directory.
 3. Generate the bitstream of the FPGA platform:
 ```
 $ make cva6_fpga