testharness: Remove spurious warnings in Verilator

Modify warnings in testharness such that they only trigger on active
clock edge (resolves an issue with verilator)

Makefile

@@ -52,18 +52,18 @@ endif
 # Sources
 # Package files -> compile first
 ariane_pkg := include/riscv_pkg.sv                          \
-			  src/riscv-dbg/src/dm_pkg.sv                   \
-			  include/ariane_pkg.sv                         \
-			  include/std_cache_pkg.sv                      \
-			  include/wt_cache_pkg.sv                       \
-			  src/axi/src/axi_pkg.sv                        \
-			  src/register_interface/src/reg_intf.sv        \
-			  src/register_interface/src/reg_intf_pkg.sv    \
-			  include/axi_intf.sv                           \
-			  tb/ariane_soc_pkg.sv                          \
-			  include/ariane_axi_pkg.sv                     \
-			  src/fpu/src/fpnew_pkg.sv                      \
-			  src/fpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
+              src/riscv-dbg/src/dm_pkg.sv                   \
+              include/ariane_pkg.sv                         \
+              include/std_cache_pkg.sv                      \
+              include/wt_cache_pkg.sv                       \
+              src/axi/src/axi_pkg.sv                        \
+              src/register_interface/src/reg_intf.sv        \
+              src/register_interface/src/reg_intf_pkg.sv    \
+              include/axi_intf.sv                           \
+              tb/ariane_soc_pkg.sv                          \
+              include/ariane_axi_pkg.sv                     \
+              src/fpu/src/fpnew_pkg.sv                      \
+              src/fpu/src/fpu_div_sqrt_mvp/hdl/defs_div_sqrt_mvp.sv
 ariane_pkg := $(addprefix $(root-dir), $(ariane_pkg))
 
 # utility modules
@@ -368,7 +368,7 @@ verilate_command := $(verilator)
                     $(list_incdir) --top-module ariane_testharness                                     \
                     --Mdir $(ver-library) -O3                                                          \
                     --exe tb/ariane_tb.cpp tb/dpi/SimDTM.cc tb/dpi/SimJTAG.cc                          \
-					          tb/dpi/remote_bitbang.cc tb/dpi/msim_helper.cc
+					tb/dpi/remote_bitbang.cc tb/dpi/msim_helper.cc
 
 # User Verilator, at some point in the future this will be auto-generated
 verilate:

tb/ariane_testharness.sv

@@ -670,17 +670,17 @@ module ariane_testharness #(
     // Simulation Helper Functions
     // -------------
     // check for response errors
-    always_comb begin
-        if (axi_ariane_req.r_ready &&
-            axi_ariane_resp.r_valid &&
-            axi_ariane_resp.r.resp inside {axi_pkg::RESP_DECERR, axi_pkg::RESP_SLVERR}) begin
-            $warning("R Response Errored");
-        end
-        if (axi_ariane_req.b_ready &&
-            axi_ariane_resp.b_valid &&
-            axi_ariane_resp.b.resp inside {axi_pkg::RESP_DECERR, axi_pkg::RESP_SLVERR}) begin
-            $warning("B Response Errored");
-        end
+    always_ff @(posedge clk_i) begin : p_assert
+      if (axi_ariane_req.r_ready &&
+          axi_ariane_resp.r_valid &&
+          axi_ariane_resp.r.resp inside {axi_pkg::RESP_DECERR, axi_pkg::RESP_SLVERR}) begin
+          $warning("R Response Errored");
+      end
+      if (axi_ariane_req.b_ready &&
+          axi_ariane_resp.b_valid &&
+          axi_ariane_resp.b.resp inside {axi_pkg::RESP_DECERR, axi_pkg::RESP_SLVERR}) begin
+          $warning("B Response Errored");
+      end
     end
 
 `ifdef AXI_SVA