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Commit c67602dc authored by sébastien jacq's avatar sébastien jacq Committed by GitHub
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Merge pull request #2 from atrogerTHALES/master 

Corrections before contest
parents a3679a56 9e19cad5
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bench/bsp/config/link.ld
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...@@ -9,16 +9,16 @@ ...@@ -9,16 +9,16 @@
/* This linker script is adapted from the default linker script for upstream /* This linker script is adapted from the default linker script for upstream
RISC-V GCC. It has been modified for use in verification of CORE-V cores. RISC-V GCC. It has been modified for use in verification of CORE-V cores.
*/ */
// Additional contributions by: /* Additional contributions by:
// Sebastien Jacq - sjthales on github.com Sebastien Jacq - sjthales on github.com
//
// Description: linkerscript for the CV32A6 platform Description: linkerscript for the CV32A6 platform
//
// =========================================================================== // ===========================================================================
// Revisions : Revisions :
// Date Version Author Description Date Version Author Description
// 2020-10-06 0.1 S.Jacq modification of the Test for CV32A6 softcore 2020-10-06 0.1 S.Jacq modification of the Test for CV32A6 softcore
// =========================================================================== // =========================================================================== */
OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv", OUTPUT_FORMAT("elf32-littleriscv", "elf32-littleriscv",
"elf32-littleriscv") "elf32-littleriscv")
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