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MINOTAuR
printemps
Commits
7f7efd18
Commit
7f7efd18
authored
2 years ago
by
Alban Gruin
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frontend: remove usage of opaque module `unread'
Signed-off-by:
Alban Gruin
<
alban.gruin@irit.fr
>
parent
ad1081d2
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src/frontend/bht.sv
+0
-2
0 additions, 2 deletions
src/frontend/bht.sv
src/frontend/btb.sv
+0
-2
0 additions, 2 deletions
src/frontend/btb.sv
src/frontend/instr_queue.sv
+0
-6
0 additions, 6 deletions
src/frontend/instr_queue.sv
with
0 additions
and
10 deletions
src/frontend/bht.sv
+
0
−
2
View file @
7f7efd18
...
...
@@ -34,8 +34,6 @@ module bht #(
localparam
ROW_ADDR_BITS
=
$
clog2
(
ariane_pkg
::
INSTR_PER_FETCH
);
// number of bits we should use for prediction
localparam
PREDICTION_BITS
=
$
clog2
(
NR_ROWS
)
+
OFFSET
+
ROW_ADDR_BITS
;
// we are not interested in all bits of the address
unread
i_unread
(.
d_i
(
|
vpc_i
));
struct
packed
{
logic
valid
;
...
...
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src/frontend/btb.sv
+
0
−
2
View file @
7f7efd18
...
...
@@ -36,8 +36,6 @@ module btb #(
localparam
PREDICTION_BITS
=
$
clog2
(
NR_ROWS
)
+
OFFSET
+
ROW_ADDR_BITS
;
// prevent aliasing to degrade performance
localparam
ANTIALIAS_BITS
=
8
;
// we are not interested in all bits of the address
unread
i_unread
(.
d_i
(
|
vpc_i
));
// typedef for all branch target entries
// we may want to try to put a tag field that fills the rest of the PC in-order to mitigate aliasing effects
...
...
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src/frontend/instr_queue.sv
+
0
−
6
View file @
7f7efd18
...
...
@@ -374,12 +374,6 @@ module instr_queue (
.
pop_i
(
pop_address
)
);
unread
i_unread_address_fifo
(.
d_i
(
|{
empty_address
,
address_queue_usage
}
));
unread
i_unread_branch_mask
(.
d_i
(
|
branch_mask_extended
));
unread
i_unread_lzc
(.
d_i
(
|{
branch_empty
}
));
unread
i_unread_fifo_pos
(.
d_i
(
|
fifo_pos_extended
));
// we don't care about the lower signals
unread
i_unread_instr_fifo
(.
d_i
(
|
instr_queue_usage
));
always_ff
@
(
posedge
clk_i
or
negedge
rst_ni
)
begin
if
(
!
rst_ni
)
begin
idx_ds_q
<=
'b1
;
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