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Commit 9c5b7c93 authored by sjthales's avatar sjthales
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update to implement cv32a6 on zybo z7-20 board

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bench/bsp/config/fpga_platform_config.h
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View file @ 9c5b7c93
...@@ -35,7 +35,7 @@ ...@@ -35,7 +35,7 @@
* Platform frequency * Platform frequency
*/ */
#define FPGA_UART_0_FREQUENCY 50000000 #define FPGA_UART_0_FREQUENCY 25000000
/***************************************************************************//** /***************************************************************************//**
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bench/bsp/config/link.ld
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View file @ 9c5b7c93
...@@ -32,7 +32,7 @@ MEMORY ...@@ -32,7 +32,7 @@ MEMORY
allowing initialized sections to be placed there). Infact we dump all allowing initialized sections to be placed there). Infact we dump all
sections to ram. */ sections to ram. */
ram (rwxai) : ORIGIN = 0x80000000, LENGTH = 0x40000 ram (rwxai) : ORIGIN = 0x80000000, LENGTH = 0x20000
dbg (rwxai) : ORIGIN = 0x1A110800, LENGTH = 0x1000 dbg (rwxai) : ORIGIN = 0x1A110800, LENGTH = 0x1000
} }
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